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Commit 3e3a5f7d authored by Arnd Bergmann's avatar Arnd Bergmann
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media: platform: remove blackfin capture driver 

The blackfin architecture is getting removed, so the video
capture driver is also obsolete.
Acked-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
Acked-by: default avatarAaron Wu <aaron.wu@analog.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent c14094a4
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drivers/media/platform/Kconfig
View file @ 3e3a5f7d
......@@ -31,8 +31,6 @@ source "drivers/media/platform/davinci/Kconfig"
source "drivers/media/platform/omap/Kconfig"
source "drivers/media/platform/blackfin/Kconfig"
config VIDEO_SH_VOU
tristate "SuperH VOU video output driver"
depends on MEDIA_CAMERA_SUPPORT
......
drivers/media/platform/Makefile
View file @ 3e3a5f7d
......@@ -53,8 +53,6 @@ obj-$(CONFIG_VIDEO_TEGRA_HDMI_CEC) += tegra-cec/
obj-y += stm32/
obj-y += blackfin/
obj-y += davinci/
obj-$(CONFIG_VIDEO_SH_VOU) += sh_vou.o
......
drivers/media/platform/blackfin/Kconfig deleted 100644 → 0
View file @ c14094a4
config VIDEO_BLACKFIN_CAPTURE
tristate "Blackfin Video Capture Driver"
depends on VIDEO_V4L2 && BLACKFIN && I2C
depends on HAS_DMA
select VIDEOBUF2_DMA_CONTIG
help
V4L2 bridge driver for Blackfin video capture device.
Choose PPI or EPPI as its interface.
To compile this driver as a module, choose M here: the
module will be called bfin_capture.
config VIDEO_BLACKFIN_PPI
tristate
depends on VIDEO_BLACKFIN_CAPTURE
default VIDEO_BLACKFIN_CAPTURE
drivers/media/platform/blackfin/Makefile deleted 100644 → 0
View file @ c14094a4
obj-$(CONFIG_VIDEO_BLACKFIN_CAPTURE) += bfin_capture.o
obj-$(CONFIG_VIDEO_BLACKFIN_PPI) += ppi.o
drivers/media/platform/blackfin/bfin_capture.c deleted 100644 → 0
View file @ c14094a4
This diff is collapsed.
drivers/media/platform/blackfin/ppi.c deleted 100644 → 0
View file @ c14094a4
/*
* ppi.c Analog Devices Parallel Peripheral Interface driver
*
* Copyright (c) 2011 Analog Devices Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
#include <asm/bfin_ppi.h>
#include <asm/blackfin.h>
#include <asm/cacheflush.h>
#include <asm/dma.h>
#include <asm/portmux.h>
#include <media/blackfin/ppi.h>
static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
static void ppi_detach_irq(struct ppi_if *ppi);
static int ppi_start(struct ppi_if *ppi);
static int ppi_stop(struct ppi_if *ppi);
static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params);
static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);
static const struct ppi_ops ppi_ops = {
.attach_irq = ppi_attach_irq,
.detach_irq = ppi_detach_irq,
.start = ppi_start,
.stop = ppi_stop,
.set_params = ppi_set_params,
.update_addr = ppi_update_addr,
};
static irqreturn_t ppi_irq_err(int irq, void *dev_id)
{
struct ppi_if *ppi = dev_id;
const struct ppi_info *info = ppi->info;
switch (info->type) {
case PPI_TYPE_PPI:
{
struct bfin_ppi_regs *reg = info->base;
unsigned short status;
/* register on bf561 is cleared when read
* others are W1C
*/
status = bfin_read16(&reg->status);
if (status & 0x3000)
ppi->err = true;
bfin_write16(&reg->status, 0xff00);
break;
}
case PPI_TYPE_EPPI:
{
struct bfin_eppi_regs *reg = info->base;
unsigned short status;
status = bfin_read16(&reg->status);
if (status & 0x2)
ppi->err = true;
bfin_write16(&reg->status, 0xffff);
break;
}
case PPI_TYPE_EPPI3:
{
struct bfin_eppi3_regs *reg = info->base;
unsigned long stat;
stat = bfin_read32(&reg->stat);
if (stat & 0x2)
ppi->err = true;
bfin_write32(&reg->stat, 0xc0ff);
break;
}
default:
break;
}
return IRQ_HANDLED;
}
static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
{
const struct ppi_info *info = ppi->info;
int ret;
ret = request_dma(info->dma_ch, "PPI_DMA");
if (ret) {
pr_err("Unable to allocate DMA channel for PPI\n");
return ret;
}
set_dma_callback(info->dma_ch, handler, ppi);
if (ppi->err_int) {
ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
if (ret) {
pr_err("Unable to allocate IRQ for PPI\n");
free_dma(info->dma_ch);
}
}
return ret;
}
static void ppi_detach_irq(struct ppi_if *ppi)
{
const struct ppi_info *info = ppi->info;
if (ppi->err_int)
free_irq(info->irq_err, ppi);
free_dma(info->dma_ch);
}
static int ppi_start(struct ppi_if *ppi)
{
const struct ppi_info *info = ppi->info;
/* enable DMA */
enable_dma(info->dma_ch);
/* enable PPI */
ppi->ppi_control |= PORT_EN;
switch (info->type) {
case PPI_TYPE_PPI:
{
struct bfin_ppi_regs *reg = info->base;
bfin_write16(&reg->control, ppi->ppi_control);
break;
}
case PPI_TYPE_EPPI:
{
struct bfin_eppi_regs *reg = info->base;
bfin_write32(&reg->control, ppi->ppi_control);
break;
}
case PPI_TYPE_EPPI3:
{
struct bfin_eppi3_regs *reg = info->base;
bfin_write32(&reg->ctl, ppi->ppi_control);
break;
}
default:
return -EINVAL;
}
SSYNC();
return 0;
}
static int ppi_stop(struct ppi_if *ppi)
{
const struct ppi_info *info = ppi->info;
/* disable PPI */
ppi->ppi_control &= ~PORT_EN;
switch (info->type) {
case PPI_TYPE_PPI:
{
struct bfin_ppi_regs *reg = info->base;
bfin_write16(&reg->control, ppi->ppi_control);
break;
}
case PPI_TYPE_EPPI:
{
struct bfin_eppi_regs *reg = info->base;
bfin_write32(&reg->control, ppi->ppi_control);
break;
}
case PPI_TYPE_EPPI3:
{
struct bfin_eppi3_regs *reg = info->base;
bfin_write32(&reg->ctl, ppi->ppi_control);
break;
}
default:
return -EINVAL;
}
/* disable DMA */
clear_dma_irqstat(info->dma_ch);
disable_dma(info->dma_ch);
SSYNC();
return 0;
}
static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params)
{
const struct ppi_info *info = ppi->info;
int dma32 = 0;
int dma_config, bytes_per_line;
int hcount, hdelay, samples_per_line;
#ifdef CONFIG_PINCTRL
static const char * const pin_state[] = {"8bit", "16bit", "24bit"};
struct pinctrl *pctrl;
struct pinctrl_state *pstate;
if (params->dlen > 24 || params->dlen <= 0)
return -EINVAL;
pctrl = devm_pinctrl_get(ppi->dev);
if (IS_ERR(pctrl))
return PTR_ERR(pctrl);
pstate = pinctrl_lookup_state(pctrl,
pin_state[(params->dlen + 7) / 8 - 1]);
if (pinctrl_select_state(pctrl, pstate))
return -EINVAL;
#endif
bytes_per_line = params->width * params->bpp / 8;
/* convert parameters unit from pixels to samples */
hcount = params->width * params->bpp / params->dlen;
hdelay = params->hdelay * params->bpp / params->dlen;
samples_per_line = params->line * params->bpp / params->dlen;
if (params->int_mask == 0xFFFFFFFF)
ppi->err_int = false;
else
ppi->err_int = true;
dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y);
ppi->ppi_control = params->ppi_control & ~PORT_EN;
if (!(ppi->ppi_control & PORT_DIR))
dma_config |= WNR;
switch (info->type) {
case PPI_TYPE_PPI:
{
struct bfin_ppi_regs *reg = info->base;
if (params->ppi_control & DMA32)
dma32 = 1;
bfin_write16(&reg->control, ppi->ppi_control);
bfin_write16(&reg->count, samples_per_line - 1);
bfin_write16(&reg->frame, params->frame);
break;
}
case PPI_TYPE_EPPI:
{
struct bfin_eppi_regs *reg = info->base;
if ((params->ppi_control & PACK_EN)
|| (params->ppi_control & 0x38000) > DLEN_16)
dma32 = 1;
bfin_write32(&reg->control, ppi->ppi_control);
bfin_write16(&reg->line, samples_per_line);
bfin_write16(&reg->frame, params->frame);
bfin_write16(&reg->hdelay, hdelay);
bfin_write16(&reg->vdelay, params->vdelay);
bfin_write16(&reg->hcount, hcount);
bfin_write16(&reg->vcount, params->height);
break;
}
case PPI_TYPE_EPPI3:
{
struct bfin_eppi3_regs *reg = info->base;
if ((params->ppi_control & PACK_EN)
|| (params->ppi_control & 0x70000) > DLEN_16)
dma32 = 1;
bfin_write32(&reg->ctl, ppi->ppi_control);
bfin_write32(&reg->line, samples_per_line);
bfin_write32(&reg->frame, params->frame);
bfin_write32(&reg->hdly, hdelay);
bfin_write32(&reg->vdly, params->vdelay);
bfin_write32(&reg->hcnt, hcount);
bfin_write32(&reg->vcnt, params->height);
if (params->int_mask)
bfin_write32(&reg->imsk, params->int_mask & 0xFF);
if (ppi->ppi_control & PORT_DIR) {
u32 hsync_width, vsync_width, vsync_period;
hsync_width = params->hsync
* params->bpp / params->dlen;
vsync_width = params->vsync * samples_per_line;
vsync_period = samples_per_line * params->frame;
bfin_write32(&reg->fs1_wlhb, hsync_width);
bfin_write32(&reg->fs1_paspl, samples_per_line);
bfin_write32(&reg->fs2_wlvb, vsync_width);
bfin_write32(&reg->fs2_palpf, vsync_period);
}
break;
}
default:
return -EINVAL;
}
if (dma32) {
dma_config |= WDSIZE_32 | PSIZE_32;
set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
set_dma_x_modify(info->dma_ch, 4);
set_dma_y_modify(info->dma_ch, 4);
} else {
dma_config |= WDSIZE_16 | PSIZE_16;
set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
set_dma_x_modify(info->dma_ch, 2);
set_dma_y_modify(info->dma_ch, 2);
}
set_dma_y_count(info->dma_ch, params->height);
set_dma_config(info->dma_ch, dma_config);
SSYNC();
return 0;
}
static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
{
set_dma_start_addr(ppi->info->dma_ch, addr);
}
struct ppi_if *ppi_create_instance(struct platform_device *pdev,
const struct ppi_info *info)
{
struct ppi_if *ppi;
if (!info || !info->pin_req)
return NULL;
#ifndef CONFIG_PINCTRL
if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
dev_err(&pdev->dev, "request peripheral failed\n");
return NULL;
}
#endif
ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
if (!ppi) {
peripheral_free_list(info->pin_req);
return NULL;
}
ppi->ops = &ppi_ops;
ppi->info = info;
ppi->dev = &pdev->dev;
pr_info("ppi probe success\n");
return ppi;
}
EXPORT_SYMBOL(ppi_create_instance);
void ppi_delete_instance(struct ppi_if *ppi)
{
peripheral_free_list(ppi->info->pin_req);
kfree(ppi);
}
EXPORT_SYMBOL(ppi_delete_instance);
MODULE_DESCRIPTION("Analog Devices PPI driver");
MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
MODULE_LICENSE("GPL v2");
include/media/blackfin/bfin_capture.h deleted 100644 → 0
View file @ c14094a4
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _BFIN_CAPTURE_H_
#define _BFIN_CAPTURE_H_
#include <linux/i2c.h>
struct v4l2_input;
struct ppi_info;
struct bcap_route {
u32 input;
u32 output;
u32 ppi_control;
};
struct bfin_capture_config {
/* card name */
char *card_name;
/* inputs available at the sub device */
struct v4l2_input *inputs;
/* number of inputs supported */
int num_inputs;
/* routing information for each input */
struct bcap_route *routes;
/* i2c bus adapter no */
int i2c_adapter_id;
/* i2c subdevice board info */
struct i2c_board_info board_info;
/* ppi board info */
const struct ppi_info *ppi_info;
/* ppi control */
unsigned long ppi_control;
/* ppi interrupt mask */
u32 int_mask;
/* horizontal blanking pixels */
int blank_pixels;
};
#endif
include/media/blackfin/ppi.h deleted 100644 → 0
View file @ c14094a4
/*
* Analog Devices PPI header file
*
* Copyright (c) 2011 Analog Devices Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _PPI_H_
#define _PPI_H_
#include <linux/interrupt.h>
#include <asm/blackfin.h>
#include <asm/bfin_ppi.h>
/* EPPI */
#ifdef EPPI_EN
#define PORT_EN EPPI_EN
#define PORT_DIR EPPI_DIR
#define DMA32 0
#define PACK_EN PACKEN
#endif
/* EPPI3 */
#ifdef EPPI0_CTL2
#define PORT_EN EPPI_CTL_EN
#define PORT_DIR EPPI_CTL_DIR
#define PACK_EN EPPI_CTL_PACKEN
#define DMA32 0
#define DLEN_8 EPPI_CTL_DLEN08
#define DLEN_16 EPPI_CTL_DLEN16
#endif
struct ppi_if;
struct ppi_params {
u32 width; /* width in pixels */
u32 height; /* height in lines */
u32 hdelay; /* delay after the HSYNC in pixels */
u32 vdelay; /* delay after the VSYNC in lines */
u32 line; /* total pixels per line */
u32 frame; /* total lines per frame */
u32 hsync; /* HSYNC length in pixels */
u32 vsync; /* VSYNC length in lines */
int bpp; /* bits per pixel */
int dlen; /* data length for ppi in bits */
u32 ppi_control; /* ppi configuration */
u32 int_mask; /* interrupt mask */
};
struct ppi_ops {
int (*attach_irq)(struct ppi_if *ppi, irq_handler_t handler);
void (*detach_irq)(struct ppi_if *ppi);
int (*start)(struct ppi_if *ppi);
int (*stop)(struct ppi_if *ppi);
int (*set_params)(struct ppi_if *ppi, struct ppi_params *params);
void (*update_addr)(struct ppi_if *ppi, unsigned long addr);
};
enum ppi_type {
PPI_TYPE_PPI,
PPI_TYPE_EPPI,
PPI_TYPE_EPPI3,
};
struct ppi_info {
enum ppi_type type;
int dma_ch;
int irq_err;
void __iomem *base;
const unsigned short *pin_req;
};
struct ppi_if {
struct device *dev;
unsigned long ppi_control;
const struct ppi_ops *ops;
const struct ppi_info *info;
bool err_int; /* if we need request error interrupt */
bool err; /* if ppi has fifo error */
void *priv;
};
struct ppi_if *ppi_create_instance(struct platform_device *pdev,
const struct ppi_info *info);
void ppi_delete_instance(struct ppi_if *ppi);
#endif
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