Commit 3f343ec3 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo

ARM: dts: imx7d-sdb: add rev-a board support

Current imx7d-sdb.dts has some incorrect settings about
Rev-A and Rev-B boards, some of the settings are based on
Rev-A board but some are based on Rev-B board, clean up it
by adding i.MX7D SDB Rev-A board support, make default
imx7d-sdb.dts for Rev-B board as usual, and introduce
imx7d-sdb-reva.dts for Rev-A board. Below are the affected
differences of Rev-A and Rev-B board:

                Rev-A           Rev-B
USB_OTG2_PWR:   UART3_CTS_B     GPIO1_IO07
ENET_EN_B:      None            GPIO1_IO04
TP_INT_B:       EPDC_DATA13     EPDC_BDR1
Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 4d8aa009
...@@ -574,6 +574,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \ ...@@ -574,6 +574,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-pico-pi.dtb \ imx7d-pico-pi.dtb \
imx7d-sbc-imx7.dtb \ imx7d-sbc-imx7.dtb \
imx7d-sdb.dtb \ imx7d-sdb.dtb \
imx7d-sdb-reva.dtb \
imx7d-sdb-sht11.dtb \ imx7d-sdb-sht11.dtb \
imx7s-colibri-eval-v3.dtb \ imx7s-colibri-eval-v3.dtb \
imx7s-warp.dtb imx7s-warp.dtb
......
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright (C) 2015 Freescale Semiconductor, Inc.
/dts-v1/;
#include "imx7d-sdb.dts"
/ {
reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg_reva>;
gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
};
};
&fec2 {
/delete-property/phy-supply;
};
&iomuxc {
imx7d-sdb {
pinctrl_tsc2046_pendown: tsc2046_pendown {
fsl,pins = <
MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x59
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */
>;
};
pinctrl_usb_otg2_vbus_reg_reva: usbotg2vbusregrevagrp {
fsl,pins = <
MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
>;
};
};
};
...@@ -72,9 +72,11 @@ reg_usb_otg1_vbus: regulator-usb-otg1-vbus { ...@@ -72,9 +72,11 @@ reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
reg_usb_otg2_vbus: regulator-usb-otg2-vbus { reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "usb_otg2_vbus"; regulator-name = "usb_otg2_vbus";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg>;
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>; gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
}; };
...@@ -115,6 +117,16 @@ reg_can2_3v3: regulator-can2-3v3 { ...@@ -115,6 +117,16 @@ reg_can2_3v3: regulator-can2-3v3 {
gpio = <&gpio2 14 GPIO_ACTIVE_LOW>; gpio = <&gpio2 14 GPIO_ACTIVE_LOW>;
}; };
reg_fec2_3v3: regulator-fec2-3v3 {
compatible = "regulator-fixed";
regulator-name = "fec2-3v3";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2_reg>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
};
backlight: backlight { backlight: backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000 0>; pwms = <&pwm1 0 5000000 0>;
...@@ -211,6 +223,7 @@ &fec2 { ...@@ -211,6 +223,7 @@ &fec2 {
assigned-clock-rates = <0>, <100000000>; assigned-clock-rates = <0>, <100000000>;
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&ethphy1>; phy-handle = <&ethphy1>;
phy-supply = <&reg_fec2_3v3>;
fsl,magic-packet; fsl,magic-packet;
status = "okay"; status = "okay";
}; };
...@@ -492,6 +505,12 @@ MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1 ...@@ -492,6 +505,12 @@ MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1
>; >;
}; };
pinctrl_enet2_reg: enet2reggrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x14
>;
};
pinctrl_flexcan2: flexcan2grp { pinctrl_flexcan2: flexcan2grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59 MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
...@@ -514,7 +533,6 @@ MX7D_PAD_SD2_WP__GPIO5_IO10 0x59 ...@@ -514,7 +533,6 @@ MX7D_PAD_SD2_WP__GPIO5_IO10 0x59
pinctrl_hog: hoggrp { pinctrl_hog: hoggrp {
fsl,pins = < fsl,pins = <
MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */ MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */
>; >;
}; };
...@@ -736,4 +754,10 @@ pinctrl_pwm1: pwm1grp { ...@@ -736,4 +754,10 @@ pinctrl_pwm1: pwm1grp {
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x30 MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x30
>; >;
}; };
pinctrl_usb_otg2_vbus_reg: usbotg2vbusreggrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14
>;
};
}; };
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