Commit 3f7e5815 authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Russell King

[ARM] 3817/1: iop3xx: split the iop3xx mach into iop32x and iop33x

Split the iop3xx mach type into iop32x and iop33x -- split the config
symbols, and move the code in the mach-iop3xx directory to the mach-iop32x
and mach-iop33x directories.
Signed-off-by: default avatarLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 98954df6
...@@ -202,12 +202,20 @@ config ARCH_IMX ...@@ -202,12 +202,20 @@ config ARCH_IMX
help help
Support for Motorola's i.MX family of processors (MX1, MXL). Support for Motorola's i.MX family of processors (MX1, MXL).
config ARCH_IOP3XX config ARCH_IOP32X
bool "IOP3xx-based" bool "IOP32x-based"
depends on MMU depends on MMU
select PCI select PCI
help help
Support for Intel's IOP3XX (XScale) family of processors. Support for Intel's 80219 and IOP32X (XScale) family of
processors.
config ARCH_IOP33X
bool "IOP33x-based"
depends on MMU
select PCI
help
Support for Intel's IOP33X (XScale) family of processors.
config ARCH_IXP4XX config ARCH_IXP4XX
bool "IXP4xx-based" bool "IXP4xx-based"
...@@ -312,7 +320,9 @@ source "arch/arm/mach-footbridge/Kconfig" ...@@ -312,7 +320,9 @@ source "arch/arm/mach-footbridge/Kconfig"
source "arch/arm/mach-integrator/Kconfig" source "arch/arm/mach-integrator/Kconfig"
source "arch/arm/mach-iop3xx/Kconfig" source "arch/arm/mach-iop32x/Kconfig"
source "arch/arm/mach-iop33x/Kconfig"
source "arch/arm/mach-ixp4xx/Kconfig" source "arch/arm/mach-ixp4xx/Kconfig"
...@@ -848,7 +858,7 @@ source "drivers/block/Kconfig" ...@@ -848,7 +858,7 @@ source "drivers/block/Kconfig"
source "drivers/acorn/block/Kconfig" source "drivers/acorn/block/Kconfig"
if PCMCIA || ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX \ if PCMCIA || ARCH_CLPS7500 || ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX \
|| ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \ || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC \
|| ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \ || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE \
|| ARCH_IXP23XX || ARCH_IXP23XX
......
...@@ -101,7 +101,8 @@ endif ...@@ -101,7 +101,8 @@ endif
machine-$(CONFIG_ARCH_INTEGRATOR) := integrator machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000 textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
machine-$(CONFIG_ARCH_CLPS711X) := clps711x machine-$(CONFIG_ARCH_CLPS711X) := clps711x
machine-$(CONFIG_ARCH_IOP3XX) := iop3xx machine-$(CONFIG_ARCH_IOP32X) := iop32x
machine-$(CONFIG_ARCH_IOP33X) := iop33x
machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx
machine-$(CONFIG_ARCH_IXP2000) := ixp2000 machine-$(CONFIG_ARCH_IXP2000) := ixp2000
machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx
......
...@@ -66,7 +66,8 @@ CONFIG_KMOD=y ...@@ -66,7 +66,8 @@ CONFIG_KMOD=y
# CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y CONFIG_ARCH_IOP32X=y
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_L7200 is not set
...@@ -93,8 +94,6 @@ CONFIG_ARCH_IQ31244=y ...@@ -93,8 +94,6 @@ CONFIG_ARCH_IQ31244=y
# CONFIG_ARCH_IQ80331 is not set # CONFIG_ARCH_IQ80331 is not set
# CONFIG_MACH_IQ80332 is not set # CONFIG_MACH_IQ80332 is not set
CONFIG_ARCH_EP80219=y CONFIG_ARCH_EP80219=y
CONFIG_ARCH_IOP32X=y
# CONFIG_ARCH_IOP33X is not set
# #
# IOP3xx Chipset Features # IOP3xx Chipset Features
......
...@@ -67,7 +67,8 @@ CONFIG_KMOD=y ...@@ -67,7 +67,8 @@ CONFIG_KMOD=y
# CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y CONFIG_ARCH_IOP32X=y
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_L7200 is not set
...@@ -94,8 +95,6 @@ CONFIG_ARCH_IQ31244=y ...@@ -94,8 +95,6 @@ CONFIG_ARCH_IQ31244=y
# CONFIG_ARCH_IQ80331 is not set # CONFIG_ARCH_IQ80331 is not set
# CONFIG_MACH_IQ80332 is not set # CONFIG_MACH_IQ80332 is not set
# CONFIG_ARCH_EP80219 is not set # CONFIG_ARCH_EP80219 is not set
CONFIG_ARCH_IOP32X=y
# CONFIG_ARCH_IOP33X is not set
# #
# IOP3xx Chipset Features # IOP3xx Chipset Features
......
...@@ -66,7 +66,8 @@ CONFIG_KMOD=y ...@@ -66,7 +66,8 @@ CONFIG_KMOD=y
# CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y CONFIG_ARCH_IOP32X=y
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_L7200 is not set
...@@ -93,8 +94,6 @@ CONFIG_ARCH_IQ80321=y ...@@ -93,8 +94,6 @@ CONFIG_ARCH_IQ80321=y
# CONFIG_ARCH_IQ80331 is not set # CONFIG_ARCH_IQ80331 is not set
# CONFIG_MACH_IQ80332 is not set # CONFIG_MACH_IQ80332 is not set
# CONFIG_ARCH_EP80219 is not set # CONFIG_ARCH_EP80219 is not set
CONFIG_ARCH_IOP32X=y
# CONFIG_ARCH_IOP33X is not set
# #
# IOP3xx Chipset Features # IOP3xx Chipset Features
......
...@@ -66,7 +66,8 @@ CONFIG_KMOD=y ...@@ -66,7 +66,8 @@ CONFIG_KMOD=y
# CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y # CONFIG_ARCH_IOP32X is not set
CONFIG_ARCH_IOP33X=y
# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_L7200 is not set
...@@ -93,7 +94,6 @@ CONFIG_ARCH_IOP3XX=y ...@@ -93,7 +94,6 @@ CONFIG_ARCH_IOP3XX=y
CONFIG_ARCH_IQ80331=y CONFIG_ARCH_IQ80331=y
# CONFIG_MACH_IQ80332 is not set # CONFIG_MACH_IQ80332 is not set
# CONFIG_ARCH_EP80219 is not set # CONFIG_ARCH_EP80219 is not set
CONFIG_ARCH_IOP33X=y
# #
# IOP3xx Chipset Features # IOP3xx Chipset Features
......
...@@ -66,7 +66,8 @@ CONFIG_KMOD=y ...@@ -66,7 +66,8 @@ CONFIG_KMOD=y
# CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_INTEGRATOR is not set # CONFIG_ARCH_INTEGRATOR is not set
CONFIG_ARCH_IOP3XX=y # CONFIG_ARCH_IOP32X is not set
CONFIG_ARCH_IOP33X=y
# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_L7200 is not set # CONFIG_ARCH_L7200 is not set
...@@ -93,7 +94,6 @@ CONFIG_ARCH_IOP3XX=y ...@@ -93,7 +94,6 @@ CONFIG_ARCH_IOP3XX=y
# CONFIG_ARCH_IQ80331 is not set # CONFIG_ARCH_IQ80331 is not set
CONFIG_MACH_IQ80332=y CONFIG_MACH_IQ80332=y
# CONFIG_ARCH_EP80219 is not set # CONFIG_ARCH_EP80219 is not set
CONFIG_ARCH_IOP33X=y
# #
# IOP3xx Chipset Features # IOP3xx Chipset Features
......
if ARCH_IOP3XX if ARCH_IOP32X
menu "IOP3xx Implementation Options" menu "IOP32x Implementation Options"
comment "IOP3xx Platform Types" comment "IOP32x Platform Types"
config ARCH_IQ80321 config ARCH_IQ80321
bool "Enable support for IQ80321" bool "Enable support for IQ80321"
select ARCH_IOP32X
help help
Say Y here if you want to run your kernel on the Intel IQ80321 Say Y here if you want to run your kernel on the Intel IQ80321
evaluation kit for the IOP321 chipset. evaluation kit for the IOP321 chipset.
config ARCH_IQ31244 config ARCH_IQ31244
bool "Enable support for IQ31244" bool "Enable support for IQ31244"
select ARCH_IOP32X
help help
Say Y here if you want to run your kernel on the Intel IQ31244 Say Y here if you want to run your kernel on the Intel IQ31244
evaluation kit for the IOP321 chipset. evaluation kit for the IOP321 chipset.
config ARCH_IQ80331
bool "Enable support for IQ80331"
select ARCH_IOP33X
help
Say Y here if you want to run your kernel on the Intel IQ80331
evaluation kit for the IOP331 chipset.
config MACH_IQ80332
bool "Enable support for IQ80332"
select ARCH_IOP33X
help
Say Y here if you want to run your kernel on the Intel IQ80332
evaluation kit for the IOP332 chipset.
config ARCH_EP80219 config ARCH_EP80219
bool "Enable support for EP80219" bool "Enable support for EP80219"
select ARCH_IOP32X
select ARCH_IQ31244 select ARCH_IQ31244
help help
Say Y here if you want to run your kernel on the Intel EP80219 Say Y here if you want to run your kernel on the Intel EP80219
evaluation kit for the Intel 80219 chipset (a IOP321 variant). evaluation kit for the Intel 80219 chipset (a IOP321 variant).
# Which IOP variant are we running?
config ARCH_IOP32X
bool
help
The IQ80321 uses the IOP321 variant.
The IQ31244 and EP80219 uses the IOP321 variant.
config ARCH_IOP33X
bool
default ARCH_IQ80331
help
The IQ80331, IQ80332, and IQ80333 uses the IOP331 variant.
comment "IOP3xx Chipset Features"
config IOP331_STEPD
bool "Chip stepping D of the IOP80331 processor or IOP80333"
depends on ARCH_IOP33X
help
Say Y here if you have StepD of the IOP80331 or IOP8033
based platforms.
endmenu endmenu
endif endif
...@@ -2,22 +2,10 @@ ...@@ -2,22 +2,10 @@
# Makefile for the linux kernel. # Makefile for the linux kernel.
# #
# Object file lists. obj-y := common.o setup.o irq.o pci.o time.o
obj-y := common.o
obj-m := obj-m :=
obj-n := obj-n :=
obj- := obj- :=
obj-$(CONFIG_ARCH_IOP32X) += iop321-setup.o iop321-irq.o iop321-pci.o iop321-time.o
obj-$(CONFIG_ARCH_IOP33X) += iop331-setup.o iop331-irq.o iop331-pci.o iop331-time.o
obj-$(CONFIG_ARCH_IQ80321) += iq80321-mm.o iq80321-pci.o obj-$(CONFIG_ARCH_IQ80321) += iq80321-mm.o iq80321-pci.o
obj-$(CONFIG_ARCH_IQ31244) += iq31244-mm.o iq31244-pci.o obj-$(CONFIG_ARCH_IQ31244) += iq31244-mm.o iq31244-pci.o
obj-$(CONFIG_ARCH_IQ80331) += iq80331-mm.o iq80331-pci.o
obj-$(CONFIG_MACH_IQ80332) += iq80332-mm.o iq80332-pci.o
zreladdr-y := 0xa0008000 zreladdr-y := 0xa0008000
params_phys-y := 0xa0000100 params_phys-y := 0xa0000100
initrd_phys-y := 0xa0800000 initrd_phys-y := 0xa0800000
ifeq ($(CONFIG_ARCH_IOP33X),y)
zreladdr-y := 0x00008000
params_phys-y := 0x00000100
initrd_phys-y := 0x00800000
endif
/* /*
* arch/arm/mach-iop3xx/common.c * arch/arm/mach-iop32x/common.c
* *
* Common routines shared across all IOP3xx implementations * Common routines shared across all IOP3xx implementations
* *
......
/* /*
* linux/arch/arm/mach-iop3xx/mm.c * linux/arch/arm/mach-iop32x/iq31244-mm.c
* *
* Low level memory initialization for iq80321 platform * Low level memory initialization for iq80321 platform
* *
......
/* /*
* arch/arm/mach-iop3xx/iq80321-pci.c * arch/arm/mach-iop32x/iq31244-pci.c
* *
* PCI support for the Intel IQ80321 reference board * PCI support for the Intel IQ31244 reference board
* *
* Author: Rory Bolt <rorybolt@pacbell.net> * Author: Rory Bolt <rorybolt@pacbell.net>
* Copyright (C) 2002 Rory Bolt * Copyright (C) 2002 Rory Bolt
......
/* /*
* linux/arch/arm/mach-iop3xx/mm.c * linux/arch/arm/mach-iop32x/iq80321-mm.c
* *
* Low level memory initialization for iq80321 platform * Low level memory initialization for iq80321 platform
* *
......
/* /*
* arch/arm/mach-iop3xx/iq80321-pci.c * arch/arm/mach-iop32x/iq80321-pci.c
* *
* PCI support for the Intel IQ80321 reference board * PCI support for the Intel IQ80321 reference board
* *
......
/* /*
* linux/arch/arm/mach-iop3xx/iop321-irq.c * linux/arch/arm/mach-iop32x/irq.c
* *
* Generic IOP321 IRQ handling functionality * Generic IOP32X IRQ handling functionality
* *
* Author: Rory Bolt <rorybolt@pacbell.net> * Author: Rory Bolt <rorybolt@pacbell.net>
* Copyright (C) 2002 Rory Bolt * Copyright (C) 2002 Rory Bolt
...@@ -86,7 +86,7 @@ void __init iop321_init_irq(void) ...@@ -86,7 +86,7 @@ void __init iop321_init_irq(void)
machine_is_iq31244()) // all interrupts are inputs to chip machine_is_iq31244()) // all interrupts are inputs to chip
*IOP321_PCIIRSR = 0x0f; *IOP321_PCIIRSR = 0x0f;
for(i = IOP321_IRQ_OFS; i < NR_IOP321_IRQS; i++) for(i = IOP321_IRQ_OFS; i < NR_IRQS; i++)
{ {
set_irq_chip(i, &ext_chip); set_irq_chip(i, &ext_chip);
set_irq_handler(i, do_level_IRQ); set_irq_handler(i, do_level_IRQ);
......
/* /*
* arch/arm/mach-iop3xx/iop321-pci.c * arch/arm/mach-iop32x/pci.c
* *
* PCI support for the Intel IOP321 chipset * PCI support for the Intel IOP321 chipset
* *
......
/* /*
* linux/arch/arm/mach-iop3xx/iop321-setup.c * linux/arch/arm/mach-iop32x/setup.c
* *
* Author: Nicolas Pitre <nico@cam.org> * Author: Nicolas Pitre <nico@cam.org>
* Copyright (C) 2001 MontaVista Software, Inc. * Copyright (C) 2001 MontaVista Software, Inc.
......
/* /*
* arch/arm/mach-iop3xx/iop321-time.c * arch/arm/mach-iop32x/time.c
* *
* Timer code for IOP321 based systems * Timer code for IOP321 based systems
* *
......
if ARCH_IOP33X
menu "IOP33x Implementation Options"
comment "IOP33x Platform Types"
config ARCH_IQ80331
bool "Enable support for IQ80331"
help
Say Y here if you want to run your kernel on the Intel IQ80331
evaluation kit for the IOP331 chipset.
config MACH_IQ80332
bool "Enable support for IQ80332"
help
Say Y here if you want to run your kernel on the Intel IQ80332
evaluation kit for the IOP332 chipset.
config IOP331_STEPD
bool "Chip stepping D of the IOP80331 processor or IOP80333"
help
Say Y here if you have StepD of the IOP80331 or IOP8033
based platforms.
endmenu
endif
#
# Makefile for the linux kernel.
#
obj-y := common.o setup.o irq.o pci.o time.o
obj-m :=
obj-n :=
obj- :=
obj-$(CONFIG_ARCH_IQ80331) += iq80331-mm.o iq80331-pci.o
obj-$(CONFIG_MACH_IQ80332) += iq80332-mm.o iq80332-pci.o
zreladdr-y := 0x00008000
params_phys-y := 0x00000100
initrd_phys-y := 0x00800000
/*
* arch/arm/mach-iop33x/common.c
*
* Common routines shared across all IOP3xx implementations
*
* Author: Deepak Saxena <dsaxena@mvista.com>
*
* Copyright 2003 (c) MontaVista, Software, Inc.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/delay.h>
#include <asm/hardware.h>
/*
* Shared variables
*/
unsigned long iop3xx_pcibios_min_io = 0;
unsigned long iop3xx_pcibios_min_mem = 0;
/* /*
* linux/arch/arm/mach-iop3xx/mm.c * linux/arch/arm/mach-iop33x/iq80331-mm.c
* *
* Low level memory initialization for iq80331 platform * Low level memory initialization for iq80331 platform
* *
......
/* /*
* arch/arm/mach-iop3xx/iq80331-pci.c * arch/arm/mach-iop33x/iq80331-pci.c
* *
* PCI support for the Intel IQ80331 reference board * PCI support for the Intel IQ80331 reference board
* *
......
/* /*
* linux/arch/arm/mach-iop3xx/mm.c * linux/arch/arm/mach-iop33x/iq80332-mm.c
* *
* Low level memory initialization for iq80332 platform * Low level memory initialization for iq80332 platform
* *
......
/* /*
* arch/arm/mach-iop3xx/iq80332-pci.c * arch/arm/mach-iop33x/iq80332-pci.c
* *
* PCI support for the Intel IQ80332 reference board * PCI support for the Intel IQ80332 reference board
* *
......
/* /*
* linux/arch/arm/mach-iop3xx/iop331-irq.c * linux/arch/arm/mach-iop33x/irq.c
* *
* Generic IOP331 IRQ handling functionality * Generic IOP331 IRQ handling functionality
* *
...@@ -119,7 +119,7 @@ void __init iop331_init_irq(void) ...@@ -119,7 +119,7 @@ void __init iop331_init_irq(void)
if(machine_is_iq80331()) // all interrupts are inputs to chip if(machine_is_iq80331()) // all interrupts are inputs to chip
*IOP331_PCIIRSR = 0x0f; *IOP331_PCIIRSR = 0x0f;
for(i = IOP331_IRQ_OFS; i < NR_IOP331_IRQS; i++) for(i = IOP331_IRQ_OFS; i < NR_IRQS; i++)
{ {
set_irq_chip(i, (i < 32) ? &iop331_irqchip1 : &iop331_irqchip2); set_irq_chip(i, (i < 32) ? &iop331_irqchip1 : &iop331_irqchip2);
set_irq_handler(i, do_level_IRQ); set_irq_handler(i, do_level_IRQ);
......
/* /*
* arch/arm/mach-iop3xx/iop331-pci.c * arch/arm/mach-iop33x/pci.c
* *
* PCI support for the Intel IOP331 chipset * PCI support for the Intel IOP331 chipset
* *
......
/* /*
* linux/arch/arm/mach-iop3xx/iop331-setup.c * linux/arch/arm/mach-iop33x/setup.c
* *
* Author: Dave Jiang (dave.jiang@intel.com) * Author: Dave Jiang (dave.jiang@intel.com)
* Copyright (C) 2004 Intel Corporation. * Copyright (C) 2004 Intel Corporation.
......
/* /*
* arch/arm/mach-iop3xx/iop331-time.c * arch/arm/mach-iop33x/time.c
* *
* Timer code for IOP331 based systems * Timer code for IOP331 based systems
* *
......
...@@ -232,7 +232,7 @@ config CPU_SA1100 ...@@ -232,7 +232,7 @@ config CPU_SA1100
# XScale # XScale
config CPU_XSCALE config CPU_XSCALE
bool bool
depends on ARCH_IOP3XX || ARCH_PXA || ARCH_IXP4XX || ARCH_IXP2000 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_PXA || ARCH_IXP4XX || ARCH_IXP2000
default y default y
select CPU_32v5 select CPU_32v5
select CPU_ABRT_EV5T select CPU_ABRT_EV5T
......
...@@ -196,7 +196,7 @@ config I2C_IBM_IIC ...@@ -196,7 +196,7 @@ config I2C_IBM_IIC
config I2C_IOP3XX config I2C_IOP3XX
tristate "Intel IOP3xx and IXP4xx on-chip I2C interface" tristate "Intel IOP3xx and IXP4xx on-chip I2C interface"
depends on (ARCH_IOP3XX || ARCH_IXP4XX) && I2C depends on (ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX) && I2C
help help
Say Y here if you want to use the IIC bus controller on Say Y here if you want to use the IIC bus controller on
the Intel IOP3xx I/O Processors or IXP4xx Network Processors. the Intel IOP3xx I/O Processors or IXP4xx Network Processors.
......
/* linux/include/asm-arm/arch-iop3xx/debug-macro.S /* linux/include/asm-arm/arch-iop32x/debug-macro.S
* *
* Debugging macro include header * Debugging macro include header
* *
...@@ -13,23 +13,8 @@ ...@@ -13,23 +13,8 @@
.macro addruart,rx .macro addruart,rx
mov \rx, #0xfe000000 @ physical mov \rx, #0xfe000000 @ physical
#if defined(CONFIG_ARCH_IQ80321) || defined(CONFIG_ARCH_IQ31244)
orr \rx, \rx, #0x00800000 @ location of the UART orr \rx, \rx, #0x00800000 @ location of the UART
#elif defined(CONFIG_ARCH_IOP33X)
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x000fe000 @ Physical Base
movne \rx, #0
orr \rx, \rx, #0xfe000000
orr \rx, \rx, #0x00f00000 @ Virtual Base
orr \rx, \rx, #0x00001700 @ location of the UART
#else
#error Unknown IOP3XX implementation
#endif
.endm .endm
#if !defined(CONFIG_ARCH_IQ80321) || !defined(CONFIG_ARCH_IQ31244) || !defined(CONFIG_ARCH_IQ80331)
#define FLOW_CONTROL
#endif
#define UART_SHIFT 0 #define UART_SHIFT 0
#include <asm/hardware/debug-8250.S> #include <asm/hardware/debug-8250.S>
/* /*
* linux/include/asm-arm/arch-iop3xx/dma.h * linux/include/asm-arm/arch-iop32x/dma.h
* *
* Copyright (C) 2004 Intel Corp. * Copyright (C) 2004 Intel Corp.
* *
......
/*
* include/asm-arm/arch-iop32x/entry-macro.S
*
* Low-level IRQ helper macros for IOP32x-based platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <asm/arch/irqs.h>
.macro disable_fiq
.endm
/*
* Note: only deal with normal interrupts, not FIQ
*/
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqnr, #0
mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC
cmp \irqstat, #0
beq 1001f
clz \irqnr, \irqstat
mov \base, #31
subs \irqnr,\base,\irqnr
add \irqnr,\irqnr,#IRQ_IOP321_DMA0_EOT
1001:
.endm
/* /*
* linux/include/asm-arm/arch-iop3xx/hardware.h * linux/include/asm-arm/arch-iop32x/hardware.h
*/ */
#ifndef __ASM_ARCH_HARDWARE_H #ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H
...@@ -44,14 +44,11 @@ extern unsigned int processor_id; ...@@ -44,14 +44,11 @@ extern unsigned int processor_id;
* *
*/ */
#include "iop321.h" #include "iop321.h"
#include "iop331.h"
/* /*
* Board specific bits * Board specific bits
*/ */
#include "iq80321.h" #include "iq80321.h"
#include "iq31244.h" #include "iq31244.h"
#include "iq80331.h"
#include "iq80332.h"
#endif /* _ASM_ARCH_HARDWARE_H */ #endif /* _ASM_ARCH_HARDWARE_H */
/* /*
* linux/include/asm-arm/arch-iop3xx/io.h * linux/include/asm-arm/arch-iop32x/io.h
* *
* Copyright (C) 2001 MontaVista Software, Inc. * Copyright (C) 2001 MontaVista Software, Inc.
* *
......
/* /*
* linux/include/asm/arch-iop3xx/iop321.h * linux/include/asm/arch-iop32x/iop321.h
* *
* Intel IOP321 Chip definitions * Intel IOP321 Chip definitions
* *
...@@ -21,11 +21,7 @@ ...@@ -21,11 +21,7 @@
* IOP3xx variants but behave slightly differently on each. * IOP3xx variants but behave slightly differently on each.
*/ */
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#ifdef CONFIG_ARCH_IOP32X #define iop_is_321() 1
#define iop_is_321() (((processor_id & 0xfffff5e0) == 0x69052420))
#else
#define iop_is_321() 0
#endif
#endif #endif
/* /*
......
/* /*
* linux/include/asm/arch-iop3xx/iq31244.h * linux/include/asm/arch-iop32x/iq31244.h
* *
* Intel IQ31244 evaluation board registers * Intel IQ31244 evaluation board registers
*/ */
......
/* /*
* linux/include/asm/arch-iop3xx/iq80321.h * linux/include/asm/arch-iop32x/iq80321.h
* *
* Intel IQ80321 evaluation board registers * Intel IQ80321 evaluation board registers
*/ */
......
/* /*
* linux/include/asm-arm/arch-iop3xx/irqs.h * linux/include/asm-arm/arch-iop32x/irqs.h
* *
* Author: Rory Bolt <rorybolt@pacbell.net> * Author: Rory Bolt <rorybolt@pacbell.net>
* Copyright: (C) 2002 Rory Bolt * Copyright: (C) 2002 Rory Bolt
...@@ -9,8 +9,8 @@ ...@@ -9,8 +9,8 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
* *
*/ */
#ifndef _IOP321_IRQS_H_ #ifndef _IRQS_H_
#define _IOP321_IRQS_H_ #define _IRQS_H_
/* /*
* IOP80321 chipset interrupts * IOP80321 chipset interrupts
...@@ -54,9 +54,7 @@ ...@@ -54,9 +54,7 @@
#define IRQ_IOP321_XINT3 IOP321_IRQ(30) #define IRQ_IOP321_XINT3 IOP321_IRQ(30)
#define IRQ_IOP321_HPI IOP321_IRQ(31) #define IRQ_IOP321_HPI IOP321_IRQ(31)
#define NR_IOP321_IRQS (IOP321_IRQ(31) + 1) #define NR_IRQS (IOP321_IRQ(31) + 1)
#define NR_IRQS NR_IOP321_IRQS
/* /*
...@@ -97,4 +95,4 @@ ...@@ -97,4 +95,4 @@
#define IRQ_IQ31244_INTC IRQ_IOP321_XINT2 #define IRQ_IQ31244_INTC IRQ_IOP321_XINT2
#define IRQ_IQ31244_INTD IRQ_IOP321_XINT3 #define IRQ_IQ31244_INTD IRQ_IOP321_XINT3
#endif // _IOP321_IRQ_H_ #endif // _IRQ_H_
/* /*
* linux/include/asm-arm/arch-iop3xx/memory.h * linux/include/asm-arm/arch-iop32x/memory.h
*/ */
#ifndef __ASM_ARCH_MEMORY_H #ifndef __ASM_ARCH_MEMORY_H
...@@ -10,11 +10,7 @@ ...@@ -10,11 +10,7 @@
/* /*
* Physical DRAM offset. * Physical DRAM offset.
*/ */
#ifndef CONFIG_ARCH_IOP33X
#define PHYS_OFFSET UL(0xa0000000) #define PHYS_OFFSET UL(0xa0000000)
#else
#define PHYS_OFFSET UL(0x00000000)
#endif
/* /*
* Virtual view <-> PCI DMA view memory address translations * Virtual view <-> PCI DMA view memory address translations
...@@ -23,16 +19,9 @@ ...@@ -23,16 +19,9 @@
* bus_to_virt: Used to convert an address for DMA operations * bus_to_virt: Used to convert an address for DMA operations
* to an address that the kernel can use. * to an address that the kernel can use.
*/ */
#if defined(CONFIG_ARCH_IOP32X)
#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP321_IATVR2)) | ((*IOP321_IABAR2) & 0xfffffff0)) #define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP321_IATVR2)) | ((*IOP321_IABAR2) & 0xfffffff0))
#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP321_IALR2)) | ( *IOP321_IATVR2))) #define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP321_IALR2)) | ( *IOP321_IATVR2)))
#elif defined(CONFIG_ARCH_IOP33X)
#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP331_IATVR2)) | ((*IOP331_IABAR2) & 0xfffffff0))
#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP331_IALR2)) | ( *IOP331_IATVR2)))
#endif
#endif #endif
/* /*
* linux/include/asm-arm/arch-iop3xx/system.h * linux/include/asm-arm/arch-iop32x/system.h
* *
* Copyright (C) 2001 MontaVista Software, Inc. * Copyright (C) 2001 MontaVista Software, Inc.
* *
...@@ -16,13 +16,7 @@ static inline void arch_idle(void) ...@@ -16,13 +16,7 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode) static inline void arch_reset(char mode)
{ {
#ifdef CONFIG_ARCH_IOP32X
*IOP321_PCSR = 0x30; *IOP321_PCSR = 0x30;
#endif
#ifdef CONFIG_ARCH_IOP33X
*IOP331_PCSR = 0x30;
#endif
if ( 1 && mode == 's') { if ( 1 && mode == 's') {
/* Jump into ROM at address 0 */ /* Jump into ROM at address 0 */
......
/*
* linux/include/asm-arm/arch-iop32x/timex.h
*
* IOP3xx architecture timex specifications
*/
#include <asm/hardware.h>
#define CLOCK_TICK_RATE IOP321_TICK_RATE
/* /*
* linux/include/asm-arm/arch-iop3xx/uncompress.h * linux/include/asm-arm/arch-iop32x/uncompress.h
*/ */
#include <asm/types.h> #include <asm/types.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <linux/serial_reg.h> #include <linux/serial_reg.h>
#include <asm/hardware.h> #include <asm/hardware.h>
#ifdef CONFIG_ARCH_IOP32X static volatile u8 *uart_base;
#define UTYPE unsigned char *
#elif defined(CONFIG_ARCH_IOP33X)
#define UTYPE u32 *
#else
#error "Missing IOP3xx arch type def"
#endif
static volatile UTYPE uart_base;
#define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE) #define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE)
...@@ -31,14 +23,12 @@ static inline void flush(void) ...@@ -31,14 +23,12 @@ static inline void flush(void)
static __inline__ void __arch_decomp_setup(unsigned long arch_id) static __inline__ void __arch_decomp_setup(unsigned long arch_id)
{ {
if(machine_is_iq80321()) if (machine_is_iq80321())
uart_base = (volatile UTYPE)IQ80321_UART; uart_base = (volatile u8 *)IQ80321_UART;
else if(machine_is_iq31244()) else if (machine_is_iq31244())
uart_base = (volatile UTYPE)IQ31244_UART; uart_base = (volatile u8 *)IQ31244_UART;
else if(machine_is_iq80331() || machine_is_iq80332()) else
uart_base = (volatile UTYPE)IOP331_UART0_PHYS; uart_base = (volatile u8 *)0xfe800000;
else
uart_base = (volatile UTYPE)0xfe800000;
} }
/* /*
......
/* /*
* linux/include/asm-arm/arch-iop3xx/vmalloc.h * linux/include/asm-arm/arch-iop32x/vmalloc.h
*/ */
/* /*
......
/* linux/include/asm-arm/arch-iop33x/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ mmu enabled?
moveq \rx, #0xff000000 @ physical
movne \rx, #0xfe000000 @ virtual
orr \rx, \rx, #0x00ff0000
orr \rx, \rx, #0x0000f700
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>
/* /*
* linux/include/asm-arm/arch-iop3xx/irqs.h * linux/include/asm-arm/arch-iop33x/dma.h
* *
* Copyright: (C) 2001-2003 MontaVista Software Inc. * Copyright (C) 2004 Intel Corp.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
*
*/
/*
* Chipset-specific bits
*/ */
#ifdef CONFIG_ARCH_IOP32X
#include "iop321-irqs.h"
#endif
#ifdef CONFIG_ARCH_IOP33X
#include "iop331-irqs.h"
#endif
/* /*
* include/asm-arm/arch-iop3xx/entry-macro.S * include/asm-arm/arch-iop33x/entry-macro.S
* *
* Low-level IRQ helper macros for IOP3xx-based platforms * Low-level IRQ helper macros for IOP33x-based platforms
* *
* This file is licensed under the terms of the GNU General Public * This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any * License version 2. This program is licensed "as is" without any
...@@ -9,26 +9,6 @@ ...@@ -9,26 +9,6 @@
*/ */
#include <asm/arch/irqs.h> #include <asm/arch/irqs.h>
#if defined(CONFIG_ARCH_IOP32X)
.macro disable_fiq
.endm
/*
* Note: only deal with normal interrupts, not FIQ
*/
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqnr, #0
mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC
cmp \irqstat, #0
beq 1001f
clz \irqnr, \irqstat
mov \base, #31
subs \irqnr,\base,\irqnr
add \irqnr,\irqnr,#IRQ_IOP321_DMA0_EOT
1001:
.endm
#elif defined(CONFIG_ARCH_IOP33X)
.macro disable_fiq .macro disable_fiq
.endm .endm
...@@ -47,11 +27,8 @@ ...@@ -47,11 +27,8 @@
rsbs \irqnr,\irqnr,#31 @ recommend by RMK rsbs \irqnr,\irqnr,#31 @ recommend by RMK
add \irqnr,\irqnr,#IRQ_IOP331_XINT8 add \irqnr,\irqnr,#IRQ_IOP331_XINT8
b 1001f b 1001f
1002: clz \irqnr, \irqstat 1002: clz \irqnr, \irqstat
rsbs \irqnr,\irqnr,#31 @ recommend by RMK rsbs \irqnr,\irqnr,#31 @ recommend by RMK
add \irqnr,\irqnr,#IRQ_IOP331_DMA0_EOT add \irqnr,\irqnr,#IRQ_IOP331_DMA0_EOT
1001: 1001:
.endm .endm
#endif
/*
* linux/include/asm-arm/arch-iop33x/hardware.h
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <asm/types.h>
/*
* Note about PCI IO space mappings
*
* To make IO space accesses efficient, we store virtual addresses in
* the IO resources.
*
* The PCI IO space is located at virtual 0xfe000000 from physical
* 0x90000000. The PCI BARs must be programmed with physical addresses,
* but when we read them, we convert them to virtual addresses. See
* arch/arm/mach-iop33x/pci.c
*/
#define pcibios_assign_all_busses() 1
/*
* The min PCI I/O and MEM space are dependent on what specific
* chipset/platform we are running on, so instead of hardcoding with
* #ifdefs, we just fill these in the platform level PCI init code.
*/
#ifndef __ASSEMBLY__
extern unsigned long iop3xx_pcibios_min_io;
extern unsigned long iop3xx_pcibios_min_mem;
extern unsigned int processor_id;
#endif
/*
* We just set these to zero since they are really bogus anyways
*/
#define PCIBIOS_MIN_IO (iop3xx_pcibios_min_io)
#define PCIBIOS_MIN_MEM (iop3xx_pcibios_min_mem)
/*
* Generic chipset bits
*
*/
#include "iop331.h"
/*
* Board specific bits
*/
#include "iq80331.h"
#include "iq80332.h"
#endif /* _ASM_ARCH_HARDWARE_H */
/*
* linux/include/asm-arm/arch-iop33x/io.h
*
* Copyright (C) 2001 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#include <asm/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)(p))
#define __mem_pci(a) (a)
#endif
/* /*
* linux/include/asm/arch-iop3xx/iop331.h * linux/include/asm/arch-iop33x/iop331.h
* *
* Intel IOP331 Chip definitions * Intel IOP331 Chip definitions
* *
...@@ -20,12 +20,7 @@ ...@@ -20,12 +20,7 @@
* IOP3xx variants but behave slightly differently on each. * IOP3xx variants but behave slightly differently on each.
*/ */
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#ifdef CONFIG_ARCH_IOP33X #define iop_is_331() 1
/*#define iop_is_331() ((processor_id & 0xffffffb0) == 0x69054090) */
#define iop_is_331() ((processor_id & 0xffffff30) == 0x69054010)
#else
#define iop_is_331() 0
#endif
#endif #endif
/* /*
......
/* /*
* linux/include/asm/arch-iop3xx/iq80331.h * linux/include/asm/arch-iop33x/iq80331.h
* *
* Intel IQ80331 evaluation board registers * Intel IQ80331 evaluation board registers
*/ */
......
/* /*
* linux/include/asm/arch-iop3xx/iq80332.h * linux/include/asm/arch-iop33x/iq80332.h
* *
* Intel IQ80332 evaluation board registers * Intel IQ80332 evaluation board registers
*/ */
......
/* /*
* linux/include/asm-arm/arch-iop3xx/irqs.h * linux/include/asm-arm/arch-iop33x/irqs.h
* *
* Author: Dave Jiang (dave.jiang@intel.com) * Author: Dave Jiang (dave.jiang@intel.com)
* Copyright: (C) 2003 Intel Corp. * Copyright: (C) 2003 Intel Corp.
...@@ -9,8 +9,8 @@ ...@@ -9,8 +9,8 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
* *
*/ */
#ifndef _IOP331_IRQS_H_ #ifndef _IRQS_H_
#define _IOP331_IRQS_H_ #define _IRQS_H_
/* /*
* IOP80331 chipset interrupts * IOP80331 chipset interrupts
...@@ -86,9 +86,7 @@ ...@@ -86,9 +86,7 @@
#define IRQ_IOP331_MSG_ERR IOP331_IRQ(62) // 30 #define IRQ_IOP331_MSG_ERR IOP331_IRQ(62) // 30
#define IRQ_IOP331_HPI IOP331_IRQ(63) // 31 #define IRQ_IOP331_HPI IOP331_IRQ(63) // 31
#define NR_IOP331_IRQS (IOP331_IRQ(63) + 1) #define NR_IRQS (IOP331_IRQ(63) + 1)
#define NR_IRQS NR_IOP331_IRQS
/* /*
...@@ -129,4 +127,4 @@ ...@@ -129,4 +127,4 @@
#define IRQ_IQ80332_INTC IRQ_IOP331_XINT2 #define IRQ_IQ80332_INTC IRQ_IOP331_XINT2
#define IRQ_IQ80332_INTD IRQ_IOP331_XINT3 #define IRQ_IQ80332_INTD IRQ_IOP331_XINT3
#endif // _IOP331_IRQ_H_ #endif // _IRQ_H_
/*
* linux/include/asm-arm/arch-iop33x/memory.h
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#include <asm/hardware.h>
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
/*
* Virtual view <-> PCI DMA view memory address translations
* virt_to_bus: Used to translate the virtual address to an
* address suitable to be passed to set_dma_addr
* bus_to_virt: Used to convert an address for DMA operations
* to an address that the kernel can use.
*/
#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP331_IATVR2)) | ((*IOP331_IABAR2) & 0xfffffff0))
#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP331_IALR2)) | ( *IOP331_IATVR2)))
#endif
/*
* linux/include/asm-arm/arch-iop33x/system.h
*
* Copyright (C) 2001 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
static inline void arch_idle(void)
{
cpu_do_idle();
}
static inline void arch_reset(char mode)
{
*IOP331_PCSR = 0x30;
if ( 1 && mode == 's') {
/* Jump into ROM at address 0 */
cpu_reset(0);
} else {
/* No on-chip reset capability */
cpu_reset(0);
}
}
/*
* linux/include/asm-arm/arch-iop33x/timex.h
*
* IOP3xx architecture timex specifications
*/
#include <asm/hardware.h>
#define CLOCK_TICK_RATE IOP331_TICK_RATE
/*
* linux/include/asm-arm/arch-iop33x/uncompress.h
*/
#include <asm/types.h>
#include <asm/mach-types.h>
#include <linux/serial_reg.h>
#include <asm/hardware.h>
static volatile u32 *uart_base;
#define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE)
static inline void putc(char c)
{
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
barrier();
*uart_base = c;
}
static inline void flush(void)
{
}
static __inline__ void __arch_decomp_setup(unsigned long arch_id)
{
if (machine_is_iq80331() || machine_is_iq80332())
uart_base = (volatile u32 *)IOP331_UART0_PHYS;
else
uart_base = (volatile u32 *)0xfe800000;
}
/*
* nothing to do
*/
#define arch_decomp_setup() __arch_decomp_setup(arch_id)
#define arch_decomp_wdog()
/*
* linux/include/asm-arm/arch-iop33x/vmalloc.h
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
//#define VMALLOC_END (0xe8000000)
/* increase usable physical RAM to ~992M per RMK */
#define VMALLOC_END (0xfe000000)
/*
* linux/include/asm-arm/arch-iop3xx/timex.h
*
* IOP3xx architecture timex specifications
*/
#include <asm/hardware.h>
#if defined(CONFIG_ARCH_IQ80321) || defined(CONFIG_ARCH_IQ31244)
#define CLOCK_TICK_RATE IOP321_TICK_RATE
#elif defined(CONFIG_ARCH_IQ80331) || defined(CONFIG_MACH_IQ80332)
#define CLOCK_TICK_RATE IOP331_TICK_RATE
#else
#error "No IOP3xx timex information for this architecture"
#endif
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