Commit 4022acdb authored by Arnd Bergmann's avatar Arnd Bergmann

Merge branch 'renesas/boards2' into next/late

Conflicts:
	arch/arm/mach-shmobile/setup-r8a7778.c

This is a dependency for the Renesas sh-sci updates.
Signedf-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 37c5a9f7 2c83322c
...@@ -26,6 +26,7 @@ ...@@ -26,6 +26,7 @@
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/regulator/fixed.h> #include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h> #include <linux/regulator/machine.h>
#include <linux/sh_clk.h>
#include <linux/smsc911x.h> #include <linux/smsc911x.h>
#include <mach/common.h> #include <mach/common.h>
#include <mach/irqs.h> #include <mach/irqs.h>
...@@ -65,7 +66,21 @@ static const struct pinctrl_map ape6evm_pinctrl_map[] = { ...@@ -65,7 +66,21 @@ static const struct pinctrl_map ape6evm_pinctrl_map[] = {
static void __init ape6evm_add_standard_devices(void) static void __init ape6evm_add_standard_devices(void)
{ {
struct clk *parent;
struct clk *mp;
r8a73a4_clock_init(); r8a73a4_clock_init();
/* MP clock parent = extal2 */
parent = clk_get(NULL, "extal2");
mp = clk_get(NULL, "mp");
BUG_ON(IS_ERR(parent) || IS_ERR(mp));
clk_set_parent(mp, parent);
clk_put(parent);
clk_put(mp);
pinctrl_register_mappings(ape6evm_pinctrl_map, pinctrl_register_mappings(ape6evm_pinctrl_map,
ARRAY_SIZE(ape6evm_pinctrl_map)); ARRAY_SIZE(ape6evm_pinctrl_map));
r8a73a4_pinmux_init(); r8a73a4_pinmux_init();
......
...@@ -18,14 +18,52 @@ ...@@ -18,14 +18,52 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
#include <linux/mtd/partitions.h>
#include <linux/pinctrl/machine.h> #include <linux/pinctrl/machine.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h> #include <linux/smsc911x.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <mach/common.h> #include <mach/common.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#include <mach/r8a7778.h> #include <mach/r8a7778.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
/*
* CN9(Upper side) SCIF/RCAN selection
*
* 1,4 3,6
* SW40 SCIF RCAN
* SW41 SCIF RCAN
*/
/*
* MMC (CN26) pin
*
* SW6 (D2) 3 pin
* SW7 (D5) ON
* SW8 (D3) 3 pin
* SW10 (D4) 1 pin
* SW12 (CLK) 1 pin
* SW13 (D6) 3 pin
* SW14 (CMD) ON
* SW15 (D6) 1 pin
* SW16 (D0) ON
* SW17 (D1) ON
* SW18 (D7) 3 pin
* SW19 (MMC) 1 pin
*/
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x"),
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};
static struct smsc911x_platform_config smsc911x_data = { static struct smsc911x_platform_config smsc911x_data = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
...@@ -38,29 +76,119 @@ static struct resource smsc911x_resources[] = { ...@@ -38,29 +76,119 @@ static struct resource smsc911x_resources[] = {
DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */ DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
}; };
/* SDHI */
static struct sh_mobile_sdhi_info sdhi0_info = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
};
static struct sh_eth_plat_data ether_platform_data __initdata = {
.phy = 0x01,
.edmac_endian = EDMAC_LITTLE_ENDIAN,
.register_type = SH_ETH_REG_FAST_RCAR,
.phy_interface = PHY_INTERFACE_MODE_RMII,
/*
* Although the LINK signal is available on the board, it's connected to
* the link/activity LED output of the PHY, thus the link disappears and
* reappears after each packet. We'd be better off ignoring such signal
* and getting the link state from the PHY indirectly.
*/
.no_ether_link = 1,
};
/* I2C */
static struct i2c_board_info i2c0_devices[] = {
{
I2C_BOARD_INFO("rx8581", 0x51),
},
};
/* HSPI*/
static struct mtd_partition m25p80_spi_flash_partitions[] = {
{
.name = "data(spi)",
.size = 0x0100000,
.offset = 0,
},
};
static struct flash_platform_data spi_flash_data = {
.name = "m25p80",
.type = "s25fl008k",
.parts = m25p80_spi_flash_partitions,
.nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
};
static struct spi_board_info spi_board_info[] __initdata = {
{
.modalias = "m25p80",
.max_speed_hz = 104000000,
.chip_select = 0,
.bus_num = 0,
.mode = SPI_MODE_0,
.platform_data = &spi_flash_data,
},
};
/* MMC */
static struct sh_mmcif_plat_data sh_mmcif_plat = {
.sup_pclk = 0,
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
.caps = MMC_CAP_4_BIT_DATA |
MMC_CAP_8_BIT_DATA |
MMC_CAP_NEEDS_POLL,
};
static const struct pinctrl_map bockw_pinctrl_map[] = { static const struct pinctrl_map bockw_pinctrl_map[] = {
/* Ether */
PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
"ether_rmii", "ether"),
/* HSPI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
"hspi0_a", "hspi0"),
/* MMC */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
"mmc_data8", "mmc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
"mmc_ctrl", "mmc"),
/* SCIF0 */ /* SCIF0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_data_a", "scif0"), "scif0_data_a", "scif0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778", PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_ctrl", "scif0"), "scif0_ctrl", "scif0"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
"sdhi0", "sdhi0"),
}; };
#define FPGA 0x18200000
#define IRQ0MR 0x30 #define IRQ0MR 0x30
#define PFC 0xfffc0000
#define PUPR4 0x110
static void __init bockw_init(void) static void __init bockw_init(void)
{ {
void __iomem *fpga; void __iomem *base;
r8a7778_clock_init(); r8a7778_clock_init();
r8a7778_init_irq_extpin(1); r8a7778_init_irq_extpin(1);
r8a7778_add_standard_devices(); r8a7778_add_standard_devices();
r8a7778_add_ether_device(&ether_platform_data);
r8a7778_add_i2c_device(0);
r8a7778_add_hspi_device(0);
r8a7778_add_mmc_device(&sh_mmcif_plat);
i2c_register_board_info(0, i2c0_devices,
ARRAY_SIZE(i2c0_devices));
spi_register_board_info(spi_board_info,
ARRAY_SIZE(spi_board_info));
pinctrl_register_mappings(bockw_pinctrl_map, pinctrl_register_mappings(bockw_pinctrl_map,
ARRAY_SIZE(bockw_pinctrl_map)); ARRAY_SIZE(bockw_pinctrl_map));
r8a7778_pinmux_init(); r8a7778_pinmux_init();
fpga = ioremap_nocache(0x18200000, SZ_1M); /* for SMSC */
if (fpga) { base = ioremap_nocache(FPGA, SZ_1M);
if (base) {
/* /*
* CAUTION * CAUTION
* *
...@@ -68,16 +196,33 @@ static void __init bockw_init(void) ...@@ -68,16 +196,33 @@ static void __init bockw_init(void)
* it should be cared in the future * it should be cared in the future
* Now, it is assuming IRQ0 was used only from SMSC. * Now, it is assuming IRQ0 was used only from SMSC.
*/ */
u16 val = ioread16(fpga + IRQ0MR); u16 val = ioread16(base + IRQ0MR);
val &= ~(1 << 4); /* enable SMSC911x */ val &= ~(1 << 4); /* enable SMSC911x */
iowrite16(val, fpga + IRQ0MR); iowrite16(val, base + IRQ0MR);
iounmap(fpga); iounmap(base);
regulator_register_fixed(0, dummy_supplies,
ARRAY_SIZE(dummy_supplies));
platform_device_register_resndata( platform_device_register_resndata(
&platform_bus, "smsc911x", -1, &platform_bus, "smsc911x", -1,
smsc911x_resources, ARRAY_SIZE(smsc911x_resources), smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
&smsc911x_data, sizeof(smsc911x_data)); &smsc911x_data, sizeof(smsc911x_data));
} }
/* for SDHI */
base = ioremap_nocache(PFC, 0x200);
if (base) {
/*
* FIXME
*
* SDHI CD/WP pin needs pull-up
*/
iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
iounmap(base);
r8a7778_sdhi_init(0, &sdhi0_info);
}
} }
static const char *bockw_boards_compat_dt[] __initdata = { static const char *bockw_boards_compat_dt[] __initdata = {
......
...@@ -56,7 +56,7 @@ static struct smsc911x_platform_config smsc911x_platdata = { ...@@ -56,7 +56,7 @@ static struct smsc911x_platform_config smsc911x_platdata = {
static struct platform_device smsc91x_device = { static struct platform_device smsc91x_device = {
.name = "smsc911x", .name = "smsc911x",
.id = 0, .id = -1,
.dev = { .dev = {
.platform_data = &smsc911x_platdata, .platform_data = &smsc911x_platdata,
}, },
......
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h> #include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h> #include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mfd/as3711.h>
#include <linux/mfd/tmio.h> #include <linux/mfd/tmio.h>
#include <linux/pinctrl/machine.h> #include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinconf-generic.h>
...@@ -606,6 +607,140 @@ static struct platform_device fsi_ak4648_device = { ...@@ -606,6 +607,140 @@ static struct platform_device fsi_ak4648_device = {
}; };
/* I2C */ /* I2C */
/* StepDown1 is used to supply 1.315V to the CPU */
static struct regulator_init_data as3711_sd1 = {
.constraints = {
.name = "1.315V CPU",
.boot_on = 1,
.always_on = 1,
.min_uV = 1315000,
.max_uV = 1335000,
},
};
/* StepDown2 is used to supply 1.8V to the CPU and to the board */
static struct regulator_init_data as3711_sd2 = {
.constraints = {
.name = "1.8V",
.boot_on = 1,
.always_on = 1,
.min_uV = 1800000,
.max_uV = 1800000,
},
};
/*
* StepDown3 is switched in parallel with StepDown2, seems to be off,
* according to read-back pre-set register values
*/
/* StepDown4 is used to supply 1.215V to the CPU and to the board */
static struct regulator_init_data as3711_sd4 = {
.constraints = {
.name = "1.215V",
.boot_on = 1,
.always_on = 1,
.min_uV = 1215000,
.max_uV = 1235000,
},
};
/* LDO1 is unused and unconnected */
/* LDO2 is used to supply 2.8V to the CPU */
static struct regulator_init_data as3711_ldo2 = {
.constraints = {
.name = "2.8V CPU",
.boot_on = 1,
.always_on = 1,
.min_uV = 2800000,
.max_uV = 2800000,
},
};
/* LDO3 is used to supply 3.0V to the CPU */
static struct regulator_init_data as3711_ldo3 = {
.constraints = {
.name = "3.0V CPU",
.boot_on = 1,
.always_on = 1,
.min_uV = 3000000,
.max_uV = 3000000,
},
};
/* LDO4 is used to supply 2.8V to the board */
static struct regulator_init_data as3711_ldo4 = {
.constraints = {
.name = "2.8V",
.boot_on = 1,
.always_on = 1,
.min_uV = 2800000,
.max_uV = 2800000,
},
};
/* LDO5 is switched parallel to LDO4, also set to 2.8V */
static struct regulator_init_data as3711_ldo5 = {
.constraints = {
.name = "2.8V #2",
.boot_on = 1,
.always_on = 1,
.min_uV = 2800000,
.max_uV = 2800000,
},
};
/* LDO6 is unused and unconnected */
/* LDO7 is used to supply 1.15V to the CPU */
static struct regulator_init_data as3711_ldo7 = {
.constraints = {
.name = "1.15V CPU",
.boot_on = 1,
.always_on = 1,
.min_uV = 1150000,
.max_uV = 1150000,
},
};
/* LDO8 is switched parallel to LDO7, also set to 1.15V */
static struct regulator_init_data as3711_ldo8 = {
.constraints = {
.name = "1.15V CPU #2",
.boot_on = 1,
.always_on = 1,
.min_uV = 1150000,
.max_uV = 1150000,
},
};
static struct as3711_platform_data as3711_pdata = {
.regulator = {
.init_data = {
[AS3711_REGULATOR_SD_1] = &as3711_sd1,
[AS3711_REGULATOR_SD_2] = &as3711_sd2,
[AS3711_REGULATOR_SD_4] = &as3711_sd4,
[AS3711_REGULATOR_LDO_2] = &as3711_ldo2,
[AS3711_REGULATOR_LDO_3] = &as3711_ldo3,
[AS3711_REGULATOR_LDO_4] = &as3711_ldo4,
[AS3711_REGULATOR_LDO_5] = &as3711_ldo5,
[AS3711_REGULATOR_LDO_7] = &as3711_ldo7,
[AS3711_REGULATOR_LDO_8] = &as3711_ldo8,
},
},
.backlight = {
.su2_fb = "sh_mobile_lcdc_fb.0",
.su2_max_uA = 36000,
.su2_feedback = AS3711_SU2_CURR_AUTO,
.su2_fbprot = AS3711_SU2_GPIO4,
.su2_auto_curr1 = true,
.su2_auto_curr2 = true,
.su2_auto_curr3 = true,
},
};
static struct pcf857x_platform_data pcf8575_pdata = { static struct pcf857x_platform_data pcf8575_pdata = {
.gpio_base = GPIO_PCF8575_BASE, .gpio_base = GPIO_PCF8575_BASE,
}; };
...@@ -625,6 +760,11 @@ static struct i2c_board_info i2c0_devices[] = { ...@@ -625,6 +760,11 @@ static struct i2c_board_info i2c0_devices[] = {
I2C_BOARD_INFO("adxl34x", 0x1d), I2C_BOARD_INFO("adxl34x", 0x1d),
.irq = irq_pin(26), /* IRQ26 */ .irq = irq_pin(26), /* IRQ26 */
}, },
{
I2C_BOARD_INFO("as3711", 0x40),
.irq = intcs_evt2irq(0x3300), /* IRQ24 */
.platform_data = &as3711_pdata,
},
}; };
static struct i2c_board_info i2c1_devices[] = { static struct i2c_board_info i2c1_devices[] = {
...@@ -715,59 +855,6 @@ static const struct pinctrl_map kzm_pinctrl_map[] = { ...@@ -715,59 +855,6 @@ static const struct pinctrl_map kzm_pinctrl_map[] = {
"usb_vbus", "usb"), "usb_vbus", "usb"),
}; };
/*
* FIXME
*
* This is quick hack for enabling LCDC backlight
*/
static int __init as3711_enable_lcdc_backlight(void)
{
struct i2c_adapter *a = i2c_get_adapter(0);
struct i2c_msg msg;
int i, ret;
__u8 magic[] = {
0x40, 0x2a,
0x43, 0x3c,
0x44, 0x3c,
0x45, 0x3c,
0x54, 0x03,
0x51, 0x00,
0x51, 0x01,
0xff, 0x00, /* wait */
0x43, 0xf0,
0x44, 0xf0,
0x45, 0xf0,
};
if (!of_machine_is_compatible("renesas,kzm9g"))
return 0;
if (!a)
return 0;
msg.addr = 0x40;
msg.len = 2;
msg.flags = 0;
for (i = 0; i < ARRAY_SIZE(magic); i += 2) {
msg.buf = magic + i;
if (0xff == msg.buf[0]) {
udelay(500);
continue;
}
ret = i2c_transfer(a, &msg, 1);
if (ret < 0) {
pr_err("i2c transfer fail\n");
break;
}
}
return 0;
}
device_initcall(as3711_enable_lcdc_backlight);
static void __init kzm_init(void) static void __init kzm_init(void)
{ {
regulator_register_always_on(2, "fixed-1.8V", fixed1v8_power_consumers, regulator_register_always_on(2, "fixed-1.8V", fixed1v8_power_consumers,
......
...@@ -18,16 +18,59 @@ ...@@ -18,16 +18,59 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/irqchip.h> #include <linux/irqchip.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/pinctrl/machine.h> #include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <mach/common.h> #include <mach/common.h>
#include <mach/r8a7790.h> #include <mach/r8a7790.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
/* LEDS */
static struct gpio_led lager_leds[] = {
{
.name = "led8",
.gpio = RCAR_GP_PIN(5, 17),
.default_state = LEDS_GPIO_DEFSTATE_ON,
}, {
.name = "led7",
.gpio = RCAR_GP_PIN(4, 23),
.default_state = LEDS_GPIO_DEFSTATE_ON,
}, {
.name = "led6",
.gpio = RCAR_GP_PIN(4, 22),
.default_state = LEDS_GPIO_DEFSTATE_ON,
},
};
static __initdata struct gpio_led_platform_data lager_leds_pdata = {
.leds = lager_leds,
.num_leds = ARRAY_SIZE(lager_leds),
};
/* GPIO KEY */
#define GPIO_KEY(c, g, d, ...) \
{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
static __initdata struct gpio_keys_button gpio_buttons[] = {
GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
};
static __initdata struct gpio_keys_platform_data lager_keys_pdata = {
.buttons = gpio_buttons,
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
static const struct pinctrl_map lager_pinctrl_map[] = { static const struct pinctrl_map lager_pinctrl_map[] = {
/* SCIF0 (CN19: DEBUG SERIAL0) */ /* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790", PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
...@@ -46,6 +89,12 @@ static void __init lager_add_standard_devices(void) ...@@ -46,6 +89,12 @@ static void __init lager_add_standard_devices(void)
r8a7790_pinmux_init(); r8a7790_pinmux_init();
r8a7790_add_standard_devices(); r8a7790_add_standard_devices();
platform_device_register_data(&platform_bus, "leds-gpio", -1,
&lager_leds_pdata,
sizeof(lager_leds_pdata));
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&lager_keys_pdata,
sizeof(lager_keys_pdata));
} }
static const char *lager_boards_compat_dt[] __initdata = { static const char *lager_boards_compat_dt[] __initdata = {
......
...@@ -69,7 +69,7 @@ static struct resource smsc911x_resources[] = { ...@@ -69,7 +69,7 @@ static struct resource smsc911x_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = gic_iid(0x3c), /* IRQ 1 */ .start = irq_pin(1), /* IRQ 1 */
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -350,7 +350,7 @@ static struct platform_device *marzen_late_devices[] __initdata = { ...@@ -350,7 +350,7 @@ static struct platform_device *marzen_late_devices[] __initdata = {
&ohci1_device, &ohci1_device,
}; };
void __init marzen_init_late(void) static void __init marzen_init_late(void)
{ {
/* get usb phy */ /* get usb phy */
phy = usb_get_phy(USB_PHY_TYPE_USB2); phy = usb_get_phy(USB_PHY_TYPE_USB2);
...@@ -405,6 +405,7 @@ static void __init marzen_init(void) ...@@ -405,6 +405,7 @@ static void __init marzen_init(void)
pinctrl_register_mappings(marzen_pinctrl_map, pinctrl_register_mappings(marzen_pinctrl_map,
ARRAY_SIZE(marzen_pinctrl_map)); ARRAY_SIZE(marzen_pinctrl_map));
r8a7779_pinmux_init(); r8a7779_pinmux_init();
r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
r8a7779_add_standard_devices(); r8a7779_add_standard_devices();
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
......
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#define CPG_LEN 0x270 #define CPG_LEN 0x270
#define SMSTPCR2 0xe6150138 #define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xe615013c
#define SMSTPCR5 0xe6150144 #define SMSTPCR5 0xe6150144
#define FRQCRA 0xE6150000 #define FRQCRA 0xE6150000
...@@ -348,6 +349,7 @@ static struct clk div6_clks[DIV6_NR] = { ...@@ -348,6 +349,7 @@ static struct clk div6_clks[DIV6_NR] = {
/* MSTP */ /* MSTP */
enum { enum {
MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP305,
MSTP522, MSTP522,
MSTP_NR MSTP_NR
}; };
...@@ -359,6 +361,11 @@ static struct clk mstp_clks[MSTP_NR] = { ...@@ -359,6 +361,11 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */ [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */ [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */ [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
[MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */
[MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */ [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
}; };
...@@ -381,11 +388,6 @@ static struct clk_lookup lookups[] = { ...@@ -381,11 +388,6 @@ static struct clk_lookup lookups[] = {
/* DIV6 */ /* DIV6 */
CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]), CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),
CLKDEV_CON_ID("sdhi0", &div6_clks[DIV6_SDHI0]),
CLKDEV_CON_ID("sdhi1", &div6_clks[DIV6_SDHI1]),
CLKDEV_CON_ID("sdhi2", &div6_clks[DIV6_SDHI2]),
CLKDEV_CON_ID("mmc0", &div6_clks[DIV6_MMC0]),
CLKDEV_CON_ID("mmc1", &div6_clks[DIV6_MMC1]),
CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]), CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]),
CLKDEV_CON_ID("vck2", &div6_clks[DIV6_VCK2]), CLKDEV_CON_ID("vck2", &div6_clks[DIV6_VCK2]),
CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]), CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]),
...@@ -406,6 +408,16 @@ static struct clk_lookup lookups[] = { ...@@ -406,6 +408,16 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]), CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
/* for DT */ /* for DT */
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
......
...@@ -103,17 +103,25 @@ static struct clk *main_clks[] = { ...@@ -103,17 +103,25 @@ static struct clk *main_clks[] = {
}; };
enum { enum {
MSTP331,
MSTP323, MSTP322, MSTP321, MSTP323, MSTP322, MSTP321,
MSTP114, MSTP114,
MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, MSTP030,
MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
MSTP016, MSTP015, MSTP016, MSTP015,
MSTP007,
MSTP_NR }; MSTP_NR };
static struct clk mstp_clks[MSTP_NR] = { static struct clk mstp_clks[MSTP_NR] = {
[MSTP331] = SH_CLK_MSTP32(&s4_clk, MSTPCR3, 31, 0), /* MMC */
[MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */ [MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */ [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */ [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */ [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
[MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */
[MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */
[MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */
[MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */
[MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */ [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */
[MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */ [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */
[MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */ [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
...@@ -122,14 +130,24 @@ static struct clk mstp_clks[MSTP_NR] = { ...@@ -122,14 +130,24 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */ [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
[MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */ [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
[MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */ [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
[MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */
}; };
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
/* main */
CLKDEV_CON_ID("shyway_clk", &s_clk),
CLKDEV_CON_ID("peripheral_clk", &p_clk),
/* MSTP32 clocks */ /* MSTP32 clocks */
CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
...@@ -138,6 +156,9 @@ static struct clk_lookup lookups[] = { ...@@ -138,6 +156,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
}; };
void __init r8a7778_clock_init(void) void __init r8a7778_clock_init(void)
......
...@@ -181,7 +181,8 @@ static struct clk div6_clks[DIV6_NR] = { ...@@ -181,7 +181,8 @@ static struct clk div6_clks[DIV6_NR] = {
/* MSTP */ /* MSTP */
enum { enum {
MSTP721, MSTP720, MSTP721, MSTP720,
MSTP304, MSTP717, MSTP716,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
MSTP_NR MSTP_NR
}; };
...@@ -189,6 +190,12 @@ enum { ...@@ -189,6 +190,12 @@ enum {
static struct clk mstp_clks[MSTP_NR] = { static struct clk mstp_clks[MSTP_NR] = {
[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */ [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */ [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SD2], SMSTPCR3, 12, 0), /* SDHI2 */
[MSTP311] = SH_CLK_MSTP32(&div6_clks[DIV6_SD3], SMSTPCR3, 11, 0), /* SDHI3 */
[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, 0), /* MMC1 */
[MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */ [MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */
[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */ [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */ [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
...@@ -196,6 +203,8 @@ static struct clk mstp_clks[MSTP_NR] = { ...@@ -196,6 +203,8 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
}; };
static struct clk_lookup lookups[] = { static struct clk_lookup lookups[] = {
...@@ -229,14 +238,8 @@ static struct clk_lookup lookups[] = { ...@@ -229,14 +238,8 @@ static struct clk_lookup lookups[] = {
/* DIV4 */ /* DIV4 */
CLKDEV_CON_ID("sdh", &div4_clks[DIV4_SDH]), CLKDEV_CON_ID("sdh", &div4_clks[DIV4_SDH]),
CLKDEV_CON_ID("sd0", &div4_clks[DIV4_SD0]),
CLKDEV_CON_ID("sd1", &div4_clks[DIV4_SD1]),
/* DIV6 */ /* DIV6 */
CLKDEV_CON_ID("sd2", &div6_clks[DIV6_SD2]),
CLKDEV_CON_ID("sd3", &div6_clks[DIV6_SD3]),
CLKDEV_CON_ID("mmc0", &div6_clks[DIV6_MMC0]),
CLKDEV_CON_ID("mmc1", &div6_clks[DIV6_MMC1]),
CLKDEV_CON_ID("ssp", &div6_clks[DIV6_SSP]), CLKDEV_CON_ID("ssp", &div6_clks[DIV6_SSP]),
CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]), CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),
...@@ -249,6 +252,20 @@ static struct clk_lookup lookups[] = { ...@@ -249,6 +252,20 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]), CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]),
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]), CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]),
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("ee160000.sdhi", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
}; };
#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
......
...@@ -18,12 +18,17 @@ ...@@ -18,12 +18,17 @@
#ifndef __ASM_R8A7778_H__ #ifndef __ASM_R8A7778_H__
#define __ASM_R8A7778_H__ #define __ASM_R8A7778_H__
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h> #include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/sh_eth.h> #include <linux/sh_eth.h>
extern void r8a7778_add_standard_devices(void); extern void r8a7778_add_standard_devices(void);
extern void r8a7778_add_standard_devices_dt(void); extern void r8a7778_add_standard_devices_dt(void);
extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata); extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
extern void r8a7778_add_i2c_device(int id);
extern void r8a7778_add_hspi_device(int id);
extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
extern void r8a7778_init_delay(void); extern void r8a7778_init_delay(void);
extern void r8a7778_init_irq(void); extern void r8a7778_init_irq(void);
extern void r8a7778_init_irq_dt(void); extern void r8a7778_init_irq_dt(void);
......
...@@ -97,7 +97,7 @@ static struct resource ether_resources[] = { ...@@ -97,7 +97,7 @@ static struct resource ether_resources[] = {
void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata) void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
{ {
platform_device_register_resndata(&platform_bus, "sh_eth", -1, platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
ether_resources, ether_resources,
ARRAY_SIZE(ether_resources), ARRAY_SIZE(ether_resources),
pdata, sizeof(*pdata)); pdata, sizeof(*pdata));
...@@ -173,6 +173,67 @@ void __init r8a7778_sdhi_init(int id, ...@@ -173,6 +173,67 @@ void __init r8a7778_sdhi_init(int id,
info, sizeof(*info)); info, sizeof(*info));
} }
/* I2C */
static struct resource i2c_resources[] __initdata = {
/* I2C0 */
DEFINE_RES_MEM(0xffc70000, 0x1000),
DEFINE_RES_IRQ(gic_iid(0x63)),
/* I2C1 */
DEFINE_RES_MEM(0xffc71000, 0x1000),
DEFINE_RES_IRQ(gic_iid(0x6e)),
/* I2C2 */
DEFINE_RES_MEM(0xffc72000, 0x1000),
DEFINE_RES_IRQ(gic_iid(0x6c)),
/* I2C3 */
DEFINE_RES_MEM(0xffc73000, 0x1000),
DEFINE_RES_IRQ(gic_iid(0x6d)),
};
void __init r8a7778_add_i2c_device(int id)
{
BUG_ON(id < 0 || id > 3);
platform_device_register_simple(
"i2c-rcar", id,
i2c_resources + (2 * id), 2);
}
/* HSPI */
static struct resource hspi_resources[] __initdata = {
/* HSPI0 */
DEFINE_RES_MEM(0xfffc7000, 0x18),
DEFINE_RES_IRQ(gic_iid(0x5f)),
/* HSPI1 */
DEFINE_RES_MEM(0xfffc8000, 0x18),
DEFINE_RES_IRQ(gic_iid(0x74)),
/* HSPI2 */
DEFINE_RES_MEM(0xfffc6000, 0x18),
DEFINE_RES_IRQ(gic_iid(0x75)),
};
void __init r8a7778_add_hspi_device(int id)
{
BUG_ON(id < 0 || id > 2);
platform_device_register_simple(
"sh-hspi", id,
hspi_resources + (2 * id), 2);
}
/* MMC */
static struct resource mmc_resources[] __initdata = {
DEFINE_RES_MEM(0xffe4e000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x5d)),
};
void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info)
{
platform_device_register_resndata(
&platform_bus, "sh_mmcif", -1,
mmc_resources, ARRAY_SIZE(mmc_resources),
info, sizeof(*info));
}
void __init r8a7778_add_standard_devices(void) void __init r8a7778_add_standard_devices(void)
{ {
int i; int i;
......
...@@ -432,7 +432,7 @@ void __init r8a7779_add_standard_devices(void) ...@@ -432,7 +432,7 @@ void __init r8a7779_add_standard_devices(void)
void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata) void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
{ {
platform_device_register_resndata(&platform_bus, "sh_eth", -1, platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
ether_resources, ether_resources,
ARRAY_SIZE(ether_resources), ARRAY_SIZE(ether_resources),
pdata, sizeof(*pdata)); pdata, sizeof(*pdata));
......
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