drm/nouveau/pm: allow to monitor hardware signal index 0x00

This signal index must be always allowed even if it's not clearly
defined in a domain in order to monitor a counter like 0x03020100
because it's the default value of signals.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c

@@ -333,10 +333,10 @@ nvkm_perfctr_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 	} else
 		return ret;
 
-	for (i = 0; i < ARRAY_SIZE(args->v0.signal) && args->v0.signal[i]; i++) {
+	for (i = 0; i < ARRAY_SIZE(args->v0.signal); i++) {
 		sig[i] = nvkm_perfsig_find(ppm, args->v0.domain,
 					   args->v0.signal[i], &dom);
-		if (!sig[i])
+		if (args->v0.signal[i] && !sig[i])
 			return -EINVAL;
 	}
 

drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.c

@@ -48,8 +48,10 @@ gf100_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
 	u32 src = 0x00000000;
 	int i;
 
-	for (i = 0; i < 4 && ctr->signal[i]; i++)
-		src |= (ctr->signal[i] - dom->signal) << (i * 8);
+	for (i = 0; i < 4; i++) {
+		if (ctr->signal[i])
+			src |= (ctr->signal[i] - dom->signal) << (i * 8);
+	}
 
 	nv_wr32(priv, dom->addr + 0x09c, 0x00040002);
 	nv_wr32(priv, dom->addr + 0x100, 0x00000000);

drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c

@@ -33,8 +33,10 @@ nv40_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
 	u32 src = 0x00000000;
 	int i;
 
-	for (i = 0; i < 4 && ctr->signal[i]; i++)
-		src |= (ctr->signal[i] - dom->signal) << (i * 8);
+	for (i = 0; i < 4; i++) {
+		if (ctr->signal[i])
+			src |= (ctr->signal[i] - dom->signal) << (i * 8);
+	}
 
 	nv_wr32(priv, 0x00a7c0 + dom->addr, 0x00000001);
 	nv_wr32(priv, 0x00a400 + dom->addr + (cntr->base.slot * 0x40), src);