Commit 41f277be authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski

dt-bindings: memory-controllers: exynos5422-dmc: Correct example syntax and memory region

After adding the interrupt properties to Exynos5422 DMC bindings
example, the mapped memory region must be big enough to access
performance counters registers.

Fix also syntax errors (semicolons) and adjust indentation.
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: default avatarLukasz Luba <l.luba@partner.samsung.com>
parent 8611ed7a
...@@ -55,7 +55,7 @@ Example: ...@@ -55,7 +55,7 @@ Example:
dmc: memory-controller@10c20000 { dmc: memory-controller@10c20000 {
compatible = "samsung,exynos5422-dmc"; compatible = "samsung,exynos5422-dmc";
reg = <0x10c20000 0x100>, <0x10c30000 0x100>, reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
clocks = <&clock CLK_FOUT_SPLL>, clocks = <&clock CLK_FOUT_SPLL>,
<&clock CLK_MOUT_SCLK_SPLL>, <&clock CLK_MOUT_SCLK_SPLL>,
<&clock CLK_FF_DOUT_SPLL2>, <&clock CLK_FF_DOUT_SPLL2>,
...@@ -63,7 +63,7 @@ Example: ...@@ -63,7 +63,7 @@ Example:
<&clock CLK_MOUT_BPLL>, <&clock CLK_MOUT_BPLL>,
<&clock CLK_SCLK_BPLL>, <&clock CLK_SCLK_BPLL>,
<&clock CLK_MOUT_MX_MSPLL_CCORE>, <&clock CLK_MOUT_MX_MSPLL_CCORE>,
<&clock CLK_MOUT_MCLK_CDREX>, <&clock CLK_MOUT_MCLK_CDREX>;
clock-names = "fout_spll", clock-names = "fout_spll",
"mout_sclk_spll", "mout_sclk_spll",
"ff_dout_spll2", "ff_dout_spll2",
...@@ -71,10 +71,10 @@ Example: ...@@ -71,10 +71,10 @@ Example:
"mout_bpll", "mout_bpll",
"sclk_bpll", "sclk_bpll",
"mout_mx_mspll_ccore", "mout_mx_mspll_ccore",
"mout_mclk_cdrex", "mout_mclk_cdrex";
operating-points-v2 = <&dmc_opp_table>; operating-points-v2 = <&dmc_opp_table>;
devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>, devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>,
<&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>; <&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>;
device-handle = <&samsung_K3QF2F20DB>; device-handle = <&samsung_K3QF2F20DB>;
vdd-supply = <&buck1_reg>; vdd-supply = <&buck1_reg>;
samsung,syscon-clk = <&clock>; samsung,syscon-clk = <&clock>;
......
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