Commit 43dba9f3 authored by Serge Semin's avatar Serge Semin Committed by Mark Brown

spi: dw: Enable interrupts in accordance with DMA xfer mode

It's pointless to track the Tx overrun interrupts if Rx-only SPI
transfer is issued. Similarly there is no need in handling the Rx
overrun/underrun interrupts if Tx-only SPI transfer is executed.
So lets unmask the interrupts only if corresponding SPI
transactions are implied.
Co-developed-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
Signed-off-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
Link: https://lore.kernel.org/r/20200522000806.7381-3-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 05897c71
...@@ -243,19 +243,23 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws, ...@@ -243,19 +243,23 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws,
static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer) static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer)
{ {
u16 dma_ctrl = 0; u16 imr = 0, dma_ctrl = 0;
dw_writel(dws, DW_SPI_DMARDLR, 0xf); dw_writel(dws, DW_SPI_DMARDLR, 0xf);
dw_writel(dws, DW_SPI_DMATDLR, 0x10); dw_writel(dws, DW_SPI_DMATDLR, 0x10);
if (xfer->tx_buf) if (xfer->tx_buf) {
dma_ctrl |= SPI_DMA_TDMAE; dma_ctrl |= SPI_DMA_TDMAE;
if (xfer->rx_buf) imr |= SPI_INT_TXOI;
}
if (xfer->rx_buf) {
dma_ctrl |= SPI_DMA_RDMAE; dma_ctrl |= SPI_DMA_RDMAE;
imr |= SPI_INT_RXUI | SPI_INT_RXOI;
}
dw_writel(dws, DW_SPI_DMACR, dma_ctrl); dw_writel(dws, DW_SPI_DMACR, dma_ctrl);
/* Set the interrupt mask */ /* Set the interrupt mask */
spi_umask_intr(dws, SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI); spi_umask_intr(dws, imr);
dws->transfer_handler = dma_transfer; dws->transfer_handler = dma_transfer;
......
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