Commit 45e96755 authored by Mark Brown's avatar Mark Brown

ASoC: Use a normal cache sync for WM8903

The driver used to use a complicated method to sync the register cache
after having brought the bias level up to standby in resume due to the
use of the write sequencer to manage the initial power up. Now that we
don't use the write sequencer there is no need for this and we can just
use snd_soc_cache_sync() directly.
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Tested-by: default avatarStephen Warren <swarren@nvidia.com>
parent 88a1b12b
......@@ -1767,23 +1767,11 @@ static int wm8903_suspend(struct snd_soc_codec *codec)
static int wm8903_resume(struct snd_soc_codec *codec)
{
int i;
u16 *reg_cache = codec->reg_cache;
u16 *tmp_cache = kmemdup(reg_cache, sizeof(wm8903_reg_defaults),
GFP_KERNEL);
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
/* Bring the codec back up to standby first to minimise pop/clicks */
wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
snd_soc_cache_sync(codec);
/* Sync back everything else */
if (tmp_cache) {
for (i = 2; i < ARRAY_SIZE(wm8903_reg_defaults); i++)
if (tmp_cache[i] != reg_cache[i])
snd_soc_write(codec, i, tmp_cache[i]);
kfree(tmp_cache);
} else {
dev_err(codec->dev, "Failed to allocate temporary cache\n");
}
wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
return 0;
}
......
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