Commit 47110b6a authored by Taniya Das's avatar Taniya Das Committed by Stephen Boyd

clk: qcom: gcc: Add support for GCC LPASS clock for SC7180

Add the GCC lpass clock which is required to access the LPASS core
clocks.
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1595606878-2664-4-git-send-email-tdas@codeaurora.orgSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 381cc6f9
...@@ -2251,6 +2251,19 @@ static struct clk_branch gcc_mss_q6_memnoc_axi_clk = { ...@@ -2251,6 +2251,19 @@ static struct clk_branch gcc_mss_q6_memnoc_axi_clk = {
}, },
}; };
static struct clk_branch gcc_lpass_cfg_noc_sway_clk = {
.halt_reg = 0x47018,
.halt_check = BRANCH_HALT_DELAY,
.clkr = {
.enable_reg = 0x47018,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_lpass_cfg_noc_sway_clk",
.ops = &clk_branch2_ops,
},
},
};
static struct gdsc ufs_phy_gdsc = { static struct gdsc ufs_phy_gdsc = {
.gdscr = 0x77004, .gdscr = 0x77004,
.pd = { .pd = {
...@@ -2428,6 +2441,7 @@ static struct clk_regmap *gcc_sc7180_clocks[] = { ...@@ -2428,6 +2441,7 @@ static struct clk_regmap *gcc_sc7180_clocks[] = {
[GCC_MSS_Q6_MEMNOC_AXI_CLK] = &gcc_mss_q6_memnoc_axi_clk.clkr, [GCC_MSS_Q6_MEMNOC_AXI_CLK] = &gcc_mss_q6_memnoc_axi_clk.clkr,
[GCC_MSS_SNOC_AXI_CLK] = &gcc_mss_snoc_axi_clk.clkr, [GCC_MSS_SNOC_AXI_CLK] = &gcc_mss_snoc_axi_clk.clkr,
[GCC_SEC_CTRL_CLK_SRC] = &gcc_sec_ctrl_clk_src.clkr, [GCC_SEC_CTRL_CLK_SRC] = &gcc_sec_ctrl_clk_src.clkr,
[GCC_LPASS_CFG_NOC_SWAY_CLK] = &gcc_lpass_cfg_noc_sway_clk.clkr,
}; };
static const struct qcom_reset_map gcc_sc7180_resets[] = { static const struct qcom_reset_map gcc_sc7180_resets[] = {
......
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