Commit 48b01e2d authored by Michael Chan's avatar Michael Chan Committed by David S. Miller

[BNX2]: Add bnx2_5706_serdes_timer().

Separate the 5706S SerDes handling code in bnx2_timer() and put it
in a new function.
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 80be4434
...@@ -4173,81 +4173,80 @@ bnx2_test_intr(struct bnx2 *bp) ...@@ -4173,81 +4173,80 @@ bnx2_test_intr(struct bnx2 *bp)
} }
static void static void
bnx2_timer(unsigned long data) bnx2_5706_serdes_timer(struct bnx2 *bp)
{ {
struct bnx2 *bp = (struct bnx2 *) data; spin_lock(&bp->phy_lock);
u32 msg; if (bp->serdes_an_pending)
bp->serdes_an_pending--;
else if ((bp->link_up == 0) && (bp->autoneg & AUTONEG_SPEED)) {
u32 bmcr;
if (!netif_running(bp->dev)) bp->current_interval = bp->timer_interval;
return;
if (atomic_read(&bp->intr_sem) != 0) bnx2_read_phy(bp, MII_BMCR, &bmcr);
goto bnx2_restart_timer;
msg = (u32) ++bp->fw_drv_pulse_wr_seq; if (bmcr & BMCR_ANENABLE) {
REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_PULSE_MB, msg); u32 phy1, phy2;
bp->stats_blk->stat_FwRxDrop = REG_RD_IND(bp, BNX2_FW_RX_DROP_COUNT); bnx2_write_phy(bp, 0x1c, 0x7c00);
bnx2_read_phy(bp, 0x1c, &phy1);
if ((bp->phy_flags & PHY_SERDES_FLAG) && bnx2_write_phy(bp, 0x17, 0x0f01);
(CHIP_NUM(bp) == CHIP_NUM_5706)) { bnx2_read_phy(bp, 0x15, &phy2);
bnx2_write_phy(bp, 0x17, 0x0f01);
bnx2_read_phy(bp, 0x15, &phy2);
spin_lock(&bp->phy_lock); if ((phy1 & 0x10) && /* SIGNAL DETECT */
if (bp->serdes_an_pending) { !(phy2 & 0x20)) { /* no CONFIG */
bp->serdes_an_pending--;
bmcr &= ~BMCR_ANENABLE;
bmcr |= BMCR_SPEED1000 | BMCR_FULLDPLX;
bnx2_write_phy(bp, MII_BMCR, bmcr);
bp->phy_flags |= PHY_PARALLEL_DETECT_FLAG;
}
} }
else if ((bp->link_up == 0) && (bp->autoneg & AUTONEG_SPEED)) { }
u32 bmcr; else if ((bp->link_up) && (bp->autoneg & AUTONEG_SPEED) &&
(bp->phy_flags & PHY_PARALLEL_DETECT_FLAG)) {
u32 phy2;
bp->current_interval = bp->timer_interval; bnx2_write_phy(bp, 0x17, 0x0f01);
bnx2_read_phy(bp, 0x15, &phy2);
if (phy2 & 0x20) {
u32 bmcr;
bnx2_read_phy(bp, MII_BMCR, &bmcr); bnx2_read_phy(bp, MII_BMCR, &bmcr);
bmcr |= BMCR_ANENABLE;
bnx2_write_phy(bp, MII_BMCR, bmcr);
if (bmcr & BMCR_ANENABLE) { bp->phy_flags &= ~PHY_PARALLEL_DETECT_FLAG;
u32 phy1, phy2; }
} else
bnx2_write_phy(bp, 0x1c, 0x7c00); bp->current_interval = bp->timer_interval;
bnx2_read_phy(bp, 0x1c, &phy1);
bnx2_write_phy(bp, 0x17, 0x0f01);
bnx2_read_phy(bp, 0x15, &phy2);
bnx2_write_phy(bp, 0x17, 0x0f01);
bnx2_read_phy(bp, 0x15, &phy2);
if ((phy1 & 0x10) && /* SIGNAL DETECT */ spin_unlock(&bp->phy_lock);
!(phy2 & 0x20)) { /* no CONFIG */ }
bmcr &= ~BMCR_ANENABLE; static void
bmcr |= BMCR_SPEED1000 | bnx2_timer(unsigned long data)
BMCR_FULLDPLX; {
bnx2_write_phy(bp, MII_BMCR, bmcr); struct bnx2 *bp = (struct bnx2 *) data;
bp->phy_flags |= u32 msg;
PHY_PARALLEL_DETECT_FLAG;
}
}
}
else if ((bp->link_up) && (bp->autoneg & AUTONEG_SPEED) &&
(bp->phy_flags & PHY_PARALLEL_DETECT_FLAG)) {
u32 phy2;
bnx2_write_phy(bp, 0x17, 0x0f01); if (!netif_running(bp->dev))
bnx2_read_phy(bp, 0x15, &phy2); return;
if (phy2 & 0x20) {
u32 bmcr;
bnx2_read_phy(bp, MII_BMCR, &bmcr); if (atomic_read(&bp->intr_sem) != 0)
bmcr |= BMCR_ANENABLE; goto bnx2_restart_timer;
bnx2_write_phy(bp, MII_BMCR, bmcr);
bp->phy_flags &= ~PHY_PARALLEL_DETECT_FLAG; msg = (u32) ++bp->fw_drv_pulse_wr_seq;
REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_PULSE_MB, msg);
} bp->stats_blk->stat_FwRxDrop = REG_RD_IND(bp, BNX2_FW_RX_DROP_COUNT);
}
else
bp->current_interval = bp->timer_interval;
spin_unlock(&bp->phy_lock); if ((bp->phy_flags & PHY_SERDES_FLAG) &&
} (CHIP_NUM(bp) == CHIP_NUM_5706))
bnx2_5706_serdes_timer(bp);
bnx2_restart_timer: bnx2_restart_timer:
mod_timer(&bp->timer, jiffies + bp->current_interval); mod_timer(&bp->timer, jiffies + bp->current_interval);
......
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