Commit 4a3dea89 authored by Alvin Lee's avatar Alvin Lee Committed by Alex Deucher

drm/amd/display: Update NV1x SR latency values

[Why]
HW team measurement requires updating values

[How]
Update bounding box values
Signed-off-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Reviewed-by: default avatarJun Lei <Jun.Lei@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c220ba6f
...@@ -298,8 +298,8 @@ static struct _vcs_dpi_soc_bounding_box_st dcn2_0_soc = { ...@@ -298,8 +298,8 @@ static struct _vcs_dpi_soc_bounding_box_st dcn2_0_soc = {
}, },
}, },
.num_states = 5, .num_states = 5,
.sr_exit_time_us = 8.6, .sr_exit_time_us = 11.6,
.sr_enter_plus_exit_time_us = 10.9, .sr_enter_plus_exit_time_us = 13.9,
.urgent_latency_us = 4.0, .urgent_latency_us = 4.0,
.urgent_latency_pixel_data_only_us = 4.0, .urgent_latency_pixel_data_only_us = 4.0,
.urgent_latency_pixel_mixed_with_vm_data_us = 4.0, .urgent_latency_pixel_mixed_with_vm_data_us = 4.0,
......
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