Commit 4bded299 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'imx-fixes-5.2' of...

Merge tag 'imx-fixes-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

i.MX fixes for 5.2:
 - A build fix for soc-imx8 driver which needs SOC_BUS support.  To
   avoid dealing with the dependency for every single i.MX SoC bus
   driver, we selects at from architecture level.
 - A fix on i.MX SCU firmware driver to ensure SCU irq is enabled only
   after IPC is ready.
 - A regression fix on cpuidle-imx6sx driver, which causes some
   characters loss on serial communication.

* tag 'imx-fixes-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: cpuidle-imx6sx: Restrict the SW2ISO increase to i.MX6SX
  firmware: imx: SCU irq should ONLY be enabled after SCU IPC is ready
  arm64: imx: Fix build error without CONFIG_SOC_BUS
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 9925a6d9 b25af2ff
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include "common.h" #include "common.h"
#include "cpuidle.h" #include "cpuidle.h"
#include "hardware.h"
static int imx6sx_idle_finish(unsigned long val) static int imx6sx_idle_finish(unsigned long val)
{ {
...@@ -110,7 +111,7 @@ int __init imx6sx_cpuidle_init(void) ...@@ -110,7 +111,7 @@ int __init imx6sx_cpuidle_init(void)
* except for power up sw2iso which need to be * except for power up sw2iso which need to be
* larger than LDO ramp up time. * larger than LDO ramp up time.
*/ */
imx_gpc_set_arm_power_up_timing(0xf, 1); imx_gpc_set_arm_power_up_timing(cpu_is_imx6sx() ? 0xf : 0x2, 1);
imx_gpc_set_arm_power_down_timing(1, 1); imx_gpc_set_arm_power_down_timing(1, 1);
return cpuidle_register(&imx6sx_cpuidle_driver, NULL); return cpuidle_register(&imx6sx_cpuidle_driver, NULL);
......
...@@ -168,6 +168,7 @@ config ARCH_MXC ...@@ -168,6 +168,7 @@ config ARCH_MXC
select IMX_GPCV2_PM_DOMAINS select IMX_GPCV2_PM_DOMAINS
select PM select PM
select PM_GENERIC_DOMAINS select PM_GENERIC_DOMAINS
select SOC_BUS
help help
This enables support for the ARMv8 based SoCs in the This enables support for the ARMv8 based SoCs in the
NXP i.MX family. NXP i.MX family.
......
...@@ -100,6 +100,9 @@ int imx_scu_irq_group_enable(u8 group, u32 mask, u8 enable) ...@@ -100,6 +100,9 @@ int imx_scu_irq_group_enable(u8 group, u32 mask, u8 enable)
struct imx_sc_rpc_msg *hdr = &msg.hdr; struct imx_sc_rpc_msg *hdr = &msg.hdr;
int ret; int ret;
if (!imx_sc_irq_ipc_handle)
return -EPROBE_DEFER;
hdr->ver = IMX_SC_RPC_VERSION; hdr->ver = IMX_SC_RPC_VERSION;
hdr->svc = IMX_SC_RPC_SVC_IRQ; hdr->svc = IMX_SC_RPC_SVC_IRQ;
hdr->func = IMX_SC_IRQ_FUNC_ENABLE; hdr->func = IMX_SC_IRQ_FUNC_ENABLE;
......
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