Commit 4e00aca3 authored by Hou Zhiqiang's avatar Hou Zhiqiang Committed by Lorenzo Pieralisi

PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound window

Current code erroneously sets-up the lower 32-bit PCI base address in
the inbound window, which results in inbound transactions not working in
64-bit platforms.

Fixes: 9af6bcb1 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: default avatarHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: default avatarMinghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: default avatarSubrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
parent 6f7374b8
......@@ -457,7 +457,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie)
}
static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
int pci_addr, u32 type, u64 size)
u64 pci_addr, u32 type, u64 size)
{
u32 value;
u64 size64 = ~(size - 1);
......@@ -483,8 +483,11 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num));
csr_writel(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num));
csr_writel(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num));
csr_writel(pcie, lower_32_bits(pci_addr),
PAB_PEX_AMAP_PEX_WIN_L(win_num));
csr_writel(pcie, upper_32_bits(pci_addr),
PAB_PEX_AMAP_PEX_WIN_H(win_num));
pcie->ib_wins_configured++;
}
......
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