Commit 4e2b4f66 authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman

ARM: dts: r8a7792: add GPIO clocks

Describe the GPIO clocks in the R8A7792 device tree.
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 1d93a8b5
......@@ -370,6 +370,27 @@ R8A7792_CLK_SCIF1 R8A7792_CLK_SCIF0
clock-output-names = "hscif1", "hscif0", "scif3",
"scif2", "scif1", "scif0";
};
mstp9_clks: mstp9_clks@e6150994 {
compatible = "renesas,r8a7792-mstp-clocks",
"renesas,cpg-mstp-clocks";
reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
<&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
<&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>;
#clock-cells = <1>;
clock-indices = <
R8A7792_CLK_GPIO7 R8A7792_CLK_GPIO6
R8A7792_CLK_GPIO5 R8A7792_CLK_GPIO4
R8A7792_CLK_GPIO3 R8A7792_CLK_GPIO2
R8A7792_CLK_GPIO1 R8A7792_CLK_GPIO0
R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10
R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8
>;
clock-output-names =
"gpio7", "gpio6", "gpio5", "gpio4",
"gpio3", "gpio2", "gpio1", "gpio0",
"gpio11", "gpio10", "gpio9", "gpio8";
};
};
/* External root clock */
......
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