Commit 4e5cafa8 authored by Florian Fainelli's avatar Florian Fainelli

ARM: brcmstb: Add debug UART entry for 72615

72165 has the same memory map as 7278 and the same physical address for
the UART, alias the definition accordingly.
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 2ca0c6a3
......@@ -33,6 +33,7 @@
#define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000)
#define UARTA_7216 UARTA_7278
#define UARTA_72164 UARTA_7278
#define UARTA_72165 UARTA_7278
#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
#define UARTA_7366 UARTA_7364
#define UARTA_74371 REG_PHYS_ADDR(0x406b00)
......@@ -86,17 +87,18 @@ ARM_BE8( rev \rv, \rv )
20: checkuart(\rp, \rv, 0x33900000, 3390)
21: checkuart(\rp, \rv, 0x72160000, 7216)
22: checkuart(\rp, \rv, 0x07216400, 72164)
23: checkuart(\rp, \rv, 0x72500000, 7250)
24: checkuart(\rp, \rv, 0x72550000, 7255)
25: checkuart(\rp, \rv, 0x72600000, 7260)
26: checkuart(\rp, \rv, 0x72680000, 7268)
27: checkuart(\rp, \rv, 0x72710000, 7271)
28: checkuart(\rp, \rv, 0x72780000, 7278)
29: checkuart(\rp, \rv, 0x73640000, 7364)
30: checkuart(\rp, \rv, 0x73660000, 7366)
31: checkuart(\rp, \rv, 0x07437100, 74371)
32: checkuart(\rp, \rv, 0x74390000, 7439)
33: checkuart(\rp, \rv, 0x74450000, 7445)
23: checkuart(\rp, \rv, 0x07216500, 72165)
24: checkuart(\rp, \rv, 0x72500000, 7250)
25: checkuart(\rp, \rv, 0x72550000, 7255)
26: checkuart(\rp, \rv, 0x72600000, 7260)
27: checkuart(\rp, \rv, 0x72680000, 7268)
28: checkuart(\rp, \rv, 0x72710000, 7271)
29: checkuart(\rp, \rv, 0x72780000, 7278)
30: checkuart(\rp, \rv, 0x73640000, 7364)
31: checkuart(\rp, \rv, 0x73660000, 7366)
32: checkuart(\rp, \rv, 0x07437100, 74371)
33: checkuart(\rp, \rv, 0x74390000, 7439)
34: checkuart(\rp, \rv, 0x74450000, 7445)
/* No valid UART found */
90: mov \rp, #0
......
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