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Commit 4f6029da authored by Ben Skeggs's avatar Ben Skeggs
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drm/nv50-nvc0: switch to common disp impl, removing previous version 

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent f9887d09
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Showing with 31 additions and 2700 deletions
drivers/gpu/drm/nouveau/Makefile
View file @ 4f6029da
......@@ -192,7 +192,7 @@ nouveau-y += nv04_fence.o nv10_fence.o nv50_fence.o nv84_fence.o nvc0_fence.o
# drm/kms
nouveau-y += nouveau_bios.o nouveau_fbcon.o nouveau_display.o
nouveau-y += nouveau_connector.o nouveau_hdmi.o nouveau_dp.o
nouveau-y += nouveau_connector.o nouveau_dp.o
nouveau-y += nv04_fbcon.o nv50_fbcon.o nvc0_fbcon.o
# drm/kms/nv04:nv50
......@@ -201,9 +201,7 @@ nouveau-y += nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o
nouveau-y += nv04_crtc.o nv04_display.o nv04_cursor.o
# drm/kms/nv50-
nouveau-y += nv50_display.o nvd0_display.o
nouveau-y += nv50_crtc.o nv50_dac.o nv50_sor.o nv50_cursor.o
nouveau-y += nv50_evo.o
nouveau-y += nvd0_display.o
# drm/pm
nouveau-y += nouveau_pm.o nouveau_volt.o nouveau_perf.o
......
drivers/gpu/drm/nouveau/nouveau_connector.h
View file @ 4f6029da
......@@ -28,6 +28,7 @@
#define __NOUVEAU_CONNECTOR_H__
#include <drm/drm_edid.h>
#include "nouveau_crtc.h"
struct nouveau_i2c_port;
......@@ -80,6 +81,21 @@ static inline struct nouveau_connector *nouveau_connector(
return container_of(con, struct nouveau_connector, base);
}
static inline struct nouveau_connector *
nouveau_crtc_connector_get(struct nouveau_crtc *nv_crtc)
{
struct drm_device *dev = nv_crtc->base.dev;
struct drm_connector *connector;
struct drm_crtc *crtc = to_drm_crtc(nv_crtc);
list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
if (connector->encoder && connector->encoder->crtc == crtc)
return nouveau_connector(connector);
}
return NULL;
}
struct drm_connector *
nouveau_connector_create(struct drm_device *, int index);
......
drivers/gpu/drm/nouveau/nouveau_crtc.h
View file @ 4f6029da
......@@ -91,7 +91,4 @@ int nv50_crtc_cursor_move(struct drm_crtc *drm_crtc, int x, int y);
int nv04_cursor_init(struct nouveau_crtc *);
int nv50_cursor_init(struct nouveau_crtc *);
struct nouveau_connector *
nouveau_crtc_connector_get(struct nouveau_crtc *crtc);
#endif /* __NOUVEAU_CRTC_H__ */
drivers/gpu/drm/nouveau/nouveau_display.c
View file @ 4f6029da
......@@ -98,12 +98,12 @@ nouveau_framebuffer_init(struct drm_device *dev,
nv_fb->r_dma = NvEvoVRAM_LP;
switch (fb->depth) {
case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break;
case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break;
case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break;
case 8: nv_fb->r_format = 0x1e00; break;
case 15: nv_fb->r_format = 0xe900; break;
case 16: nv_fb->r_format = 0xe800; break;
case 24:
case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break;
case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break;
case 32: nv_fb->r_format = 0xcf00; break;
case 30: nv_fb->r_format = 0xd100; break;
default:
NV_ERROR(drm, "unknown depth %d\n", fb->depth);
return -EINVAL;
......@@ -365,9 +365,6 @@ nouveau_display_create(struct drm_device *dev)
(nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) {
if (nv_device(drm->device)->card_type < NV_50)
ret = nv04_display_create(dev);
else
if (nv_device(drm->device)->card_type < NV_D0)
ret = nv50_display_create(dev);
else
ret = nvd0_display_create(dev);
if (ret)
......@@ -660,10 +657,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
/* Emit a page flip */
if (nv_device(drm->device)->card_type >= NV_50) {
if (nv_device(drm->device)->card_type >= NV_D0)
ret = nvd0_display_flip_next(crtc, fb, chan, 0);
else
ret = nv50_display_flip_next(crtc, fb, chan);
ret = nvd0_display_flip_next(crtc, fb, chan, 0);
if (ret) {
mutex_unlock(&chan->cli->mutex);
goto fail_unreserve;
......
drivers/gpu/drm/nouveau/nouveau_hdmi.c deleted 100644 → 0
View file @ f9887d09
/*
* Copyright 2011 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
*/
#include <drm/drmP.h>
#include "nouveau_drm.h"
#include "nouveau_connector.h"
#include "nouveau_encoder.h"
#include "nouveau_crtc.h"
#include <core/class.h>
#include "nv50_display.h"
static bool
hdmi_sor(struct drm_encoder *encoder)
{
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
if (nv_device(drm->device)->chipset < 0xa3 ||
nv_device(drm->device)->chipset == 0xaa ||
nv_device(drm->device)->chipset == 0xac)
return false;
return true;
}
static void
nouveau_audio_disconnect(struct drm_encoder *encoder)
{
struct nv50_display *priv = nv50_display(encoder->dev);
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
u32 or = nv_encoder->or;
if (hdmi_sor(encoder))
nv_exec(priv->core, NVA3_DISP_SOR_HDA_ELD + or, NULL, 0);
}
static void
nouveau_audio_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode)
{
struct nv50_display *priv = nv50_display(encoder->dev);
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_connector *nv_connector;
nv_connector = nouveau_encoder_connector_get(nv_encoder);
if (!drm_detect_monitor_audio(nv_connector->edid)) {
nouveau_audio_disconnect(encoder);
return;
}
if (hdmi_sor(encoder)) {
drm_edid_to_eld(&nv_connector->base, nv_connector->edid);
nv_exec(priv->core, NVA3_DISP_SOR_HDA_ELD + nv_encoder->or,
nv_connector->base.eld,
nv_connector->base.eld[2] * 4);
}
}
static void
nouveau_hdmi_disconnect(struct drm_encoder *encoder)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
struct nv50_display *priv = nv50_display(encoder->dev);
const u32 moff = (nv_crtc->index << 3) | nv_encoder->or;
nouveau_audio_disconnect(encoder);
nv_call(priv->core, NV84_DISP_SOR_HDMI_PWR + moff, 0x00000000);
}
void
nouveau_hdmi_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
struct nv50_display *priv = nv50_display(encoder->dev);
const u32 moff = (nv_crtc->index << 3) | nv_encoder->or;
struct nouveau_connector *nv_connector;
u32 max_ac_packet, rekey;
nv_connector = nouveau_encoder_connector_get(nv_encoder);
if (!mode || !nv_connector || !nv_connector->edid ||
!drm_detect_hdmi_monitor(nv_connector->edid)) {
nouveau_hdmi_disconnect(encoder);
return;
}
/* value matches nvidia binary driver, and tegra constant */
rekey = 56;
max_ac_packet = mode->htotal - mode->hdisplay;
max_ac_packet -= rekey;
max_ac_packet -= 18; /* constant from tegra */
max_ac_packet /= 32;
nv_call(priv->core, NV84_DISP_SOR_HDMI_PWR + moff,
NV84_DISP_SOR_HDMI_PWR_STATE_ON |
(max_ac_packet << 16) | rekey);
nouveau_audio_mode_set(encoder, mode);
}
drivers/gpu/drm/nouveau/nv50_crtc.c deleted 100644 → 0
View file @ f9887d09
This diff is collapsed.
drivers/gpu/drm/nouveau/nv50_cursor.c deleted 100644 → 0
View file @ f9887d09
/*
* Copyright (C) 2008 Maarten Maathuis.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <drm/drmP.h>
#include "nouveau_drm.h"
#include "nouveau_dma.h"
#include "nouveau_crtc.h"
#include "nv50_display.h"
static void
nv50_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
{
struct drm_device *dev = nv_crtc->base.dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_channel *evo = nv50_display(dev)->master;
int ret;
if (update && nv_crtc->cursor.visible)
return;
ret = RING_SPACE(evo, (nv_device(drm->device)->chipset != 0x50 ? 5 : 3) + update * 2);
if (ret) {
NV_ERROR(drm, "no space while unhiding cursor\n");
return;
}
if (nv_device(drm->device)->chipset != 0x50) {
BEGIN_NV04(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1);
OUT_RING(evo, NvEvoVRAM);
}
BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2);
OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_SHOW);
OUT_RING(evo, nv_crtc->cursor.offset >> 8);
if (update) {
BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);
OUT_RING(evo, 0);
FIRE_RING(evo);
nv_crtc->cursor.visible = true;
}
}
static void
nv50_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
{
struct drm_device *dev = nv_crtc->base.dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_channel *evo = nv50_display(dev)->master;
int ret;
if (update && !nv_crtc->cursor.visible)
return;
ret = RING_SPACE(evo, (nv_device(drm->device)->chipset != 0x50 ? 5 : 3) + update * 2);
if (ret) {
NV_ERROR(drm, "no space while hiding cursor\n");
return;
}
BEGIN_NV04(evo, 0, NV50_EVO_CRTC(nv_crtc->index, CURSOR_CTRL), 2);
OUT_RING(evo, NV50_EVO_CRTC_CURSOR_CTRL_HIDE);
OUT_RING(evo, 0);
if (nv_device(drm->device)->chipset != 0x50) {
BEGIN_NV04(evo, 0, NV84_EVO_CRTC(nv_crtc->index, CURSOR_DMA), 1);
OUT_RING(evo, NV84_EVO_CRTC_CURSOR_DMA_HANDLE_NONE);
}
if (update) {
BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);
OUT_RING(evo, 0);
FIRE_RING(evo);
nv_crtc->cursor.visible = false;
}
}
static void
nv50_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
{
struct nouveau_device *device = nouveau_dev(nv_crtc->base.dev);
nv_crtc->cursor_saved_x = x; nv_crtc->cursor_saved_y = y;
nv_wr32(device, NV50_PDISPLAY_CURSOR_USER_POS(nv_crtc->index),
((y & 0xFFFF) << 16) | (x & 0xFFFF));
/* Needed to make the cursor move. */
nv_wr32(device, NV50_PDISPLAY_CURSOR_USER_POS_CTRL(nv_crtc->index), 0);
}
static void
nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
{
if (offset == nv_crtc->cursor.offset)
return;
nv_crtc->cursor.offset = offset;
if (nv_crtc->cursor.visible) {
nv_crtc->cursor.visible = false;
nv_crtc->cursor.show(nv_crtc, true);
}
}
int
nv50_cursor_init(struct nouveau_crtc *nv_crtc)
{
nv_crtc->cursor.set_offset = nv50_cursor_set_offset;
nv_crtc->cursor.set_pos = nv50_cursor_set_pos;
nv_crtc->cursor.hide = nv50_cursor_hide;
nv_crtc->cursor.show = nv50_cursor_show;
return 0;
}
drivers/gpu/drm/nouveau/nv50_dac.c deleted 100644 → 0
View file @ f9887d09
/*
* Copyright (C) 2008 Maarten Maathuis.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
#include "nouveau_reg.h"
#include "nouveau_drm.h"
#include "nouveau_dma.h"
#include "nouveau_encoder.h"
#include "nouveau_connector.h"
#include "nouveau_crtc.h"
#include "nv50_display.h"
#include <core/class.h>
#include <subdev/timer.h>
static void
nv50_dac_disconnect(struct drm_encoder *encoder)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct drm_device *dev = encoder->dev;
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_channel *evo = nv50_display(dev)->master;
int ret;
if (!nv_encoder->crtc)
return;
nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
NV_DEBUG(drm, "Disconnecting DAC %d\n", nv_encoder->or);
ret = RING_SPACE(evo, 4);
if (ret) {
NV_ERROR(drm, "no space while disconnecting DAC\n");
return;
}
BEGIN_NV04(evo, 0, NV50_EVO_DAC(nv_encoder->or, MODE_CTRL), 1);
OUT_RING (evo, 0);
BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);
OUT_RING (evo, 0);
nv_encoder->crtc = NULL;
}
static enum drm_connector_status
nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
{
struct nv50_display *priv = nv50_display(encoder->dev);
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
int or = nv_encoder->or, ret;
u32 load;
if (drm->vbios.dactestval)
load = drm->vbios.dactestval;
else
load = 340;
ret = nv_exec(priv->core, NV50_DISP_DAC_LOAD + or, &load, sizeof(load));
if (ret || load != 7)
return connector_status_disconnected;
return connector_status_connected;
}
static void
nv50_dac_dpms(struct drm_encoder *encoder, int mode)
{
struct nv50_display *priv = nv50_display(encoder->dev);
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
uint32_t val;
int or = nv_encoder->or;
NV_DEBUG(drm, "or %d mode %d\n", or, mode);
if (mode != DRM_MODE_DPMS_ON)
val = NV50_PDISPLAY_DAC_DPMS_CTRL_BLANKED;
else
val = 0;
switch (mode) {
case DRM_MODE_DPMS_STANDBY:
val |= NV50_PDISPLAY_DAC_DPMS_CTRL_HSYNC_OFF;
break;
case DRM_MODE_DPMS_SUSPEND:
val |= NV50_PDISPLAY_DAC_DPMS_CTRL_VSYNC_OFF;
break;
case DRM_MODE_DPMS_OFF:
val |= NV50_PDISPLAY_DAC_DPMS_CTRL_OFF;
val |= NV50_PDISPLAY_DAC_DPMS_CTRL_HSYNC_OFF;
val |= NV50_PDISPLAY_DAC_DPMS_CTRL_VSYNC_OFF;
break;
default:
break;
}
nv_call(priv->core, NV50_DISP_DAC_PWR + or, val);
}
static void
nv50_dac_save(struct drm_encoder *encoder)
{
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
NV_ERROR(drm, "!!\n");
}
static void
nv50_dac_restore(struct drm_encoder *encoder)
{
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
NV_ERROR(drm, "!!\n");
}
static bool
nv50_dac_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_connector *connector;
NV_DEBUG(drm, "or %d\n", nv_encoder->or);
connector = nouveau_encoder_connector_get(nv_encoder);
if (!connector) {
NV_ERROR(drm, "Encoder has no connector\n");
return false;
}
if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
connector->native_mode)
drm_mode_copy(adjusted_mode, connector->native_mode);
return true;
}
static void
nv50_dac_commit(struct drm_encoder *encoder)
{
}
static void
nv50_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
struct drm_device *dev = encoder->dev;
struct nouveau_channel *evo = nv50_display(dev)->master;
struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
uint32_t mode_ctl = 0, mode_ctl2 = 0;
int ret;
NV_DEBUG(drm, "or %d type %d crtc %d\n",
nv_encoder->or, nv_encoder->dcb->type, crtc->index);
nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON);
if (crtc->index == 1)
mode_ctl |= NV50_EVO_DAC_MODE_CTRL_CRTC1;
else
mode_ctl |= NV50_EVO_DAC_MODE_CTRL_CRTC0;
/* Lacking a working tv-out, this is not a 100% sure. */
if (nv_encoder->dcb->type == DCB_OUTPUT_ANALOG)
mode_ctl |= 0x40;
else
if (nv_encoder->dcb->type == DCB_OUTPUT_TV)
mode_ctl |= 0x100;
if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
mode_ctl2 |= NV50_EVO_DAC_MODE_CTRL2_NHSYNC;
if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
mode_ctl2 |= NV50_EVO_DAC_MODE_CTRL2_NVSYNC;
ret = RING_SPACE(evo, 3);
if (ret) {
NV_ERROR(drm, "no space while connecting DAC\n");
return;
}
BEGIN_NV04(evo, 0, NV50_EVO_DAC(nv_encoder->or, MODE_CTRL), 2);
OUT_RING(evo, mode_ctl);
OUT_RING(evo, mode_ctl2);
nv_encoder->crtc = encoder->crtc;
}
static struct drm_crtc *
nv50_dac_crtc_get(struct drm_encoder *encoder)
{
return nouveau_encoder(encoder)->crtc;
}
static const struct drm_encoder_helper_funcs nv50_dac_helper_funcs = {
.dpms = nv50_dac_dpms,
.save = nv50_dac_save,
.restore = nv50_dac_restore,
.mode_fixup = nv50_dac_mode_fixup,
.prepare = nv50_dac_disconnect,
.commit = nv50_dac_commit,
.mode_set = nv50_dac_mode_set,
.get_crtc = nv50_dac_crtc_get,
.detect = nv50_dac_detect,
.disable = nv50_dac_disconnect
};
static void
nv50_dac_destroy(struct drm_encoder *encoder)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
if (!encoder)
return;
drm_encoder_cleanup(encoder);
kfree(nv_encoder);
}
static const struct drm_encoder_funcs nv50_dac_encoder_funcs = {
.destroy = nv50_dac_destroy,
};
int
nv50_dac_create(struct drm_connector *connector, struct dcb_output *entry)
{
struct nouveau_encoder *nv_encoder;
struct drm_encoder *encoder;
nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
if (!nv_encoder)
return -ENOMEM;
encoder = to_drm_encoder(nv_encoder);
nv_encoder->dcb = entry;
nv_encoder->or = ffs(entry->or) - 1;
drm_encoder_init(connector->dev, encoder, &nv50_dac_encoder_funcs,
DRM_MODE_ENCODER_DAC);
drm_encoder_helper_add(encoder, &nv50_dac_helper_funcs);
encoder->possible_crtcs = entry->heads;
encoder->possible_clones = 0;
drm_mode_connector_attach_encoder(connector, encoder);
return 0;
}
drivers/gpu/drm/nouveau/nv50_display.c deleted 100644 → 0
View file @ f9887d09
This diff is collapsed.
drivers/gpu/drm/nouveau/nv50_display.h
View file @ 4f6029da
......@@ -30,65 +30,6 @@
#include "nouveau_display.h"
#include "nouveau_crtc.h"
#include "nouveau_reg.h"
#include "nv50_evo.h"
struct nv50_display_crtc {
struct nouveau_channel *sync;
struct {
struct nouveau_bo *bo;
u32 offset;
u16 value;
} sem;
};
struct nv50_display {
struct nouveau_channel *master;
struct nouveau_object *core;
struct nouveau_gpuobj *ramin;
u32 dmao;
u32 hash;
struct nv50_display_crtc crtc[2];
struct tasklet_struct tasklet;
struct {
struct dcb_output *dcb;
u16 script;
u32 pclk;
} irq;
};
static inline struct nv50_display *
nv50_display(struct drm_device *dev)
{
return nouveau_display(dev)->priv;
}
int nv50_display_early_init(struct drm_device *dev);
void nv50_display_late_takedown(struct drm_device *dev);
int nv50_display_create(struct drm_device *dev);
int nv50_display_init(struct drm_device *dev);
void nv50_display_fini(struct drm_device *dev);
void nv50_display_destroy(struct drm_device *dev);
int nv50_crtc_blank(struct nouveau_crtc *, bool blank);
int nv50_crtc_set_clock(struct drm_device *, int head, int pclk);
u32 nv50_display_active_crtcs(struct drm_device *);
int nv50_display_sync(struct drm_device *);
int nv50_display_flip_next(struct drm_crtc *, struct drm_framebuffer *,
struct nouveau_channel *chan);
void nv50_display_flip_stop(struct drm_crtc *);
int nv50_evo_create(struct drm_device *dev);
void nv50_evo_destroy(struct drm_device *dev);
int nv50_evo_init(struct drm_device *dev);
void nv50_evo_fini(struct drm_device *dev);
void nv50_evo_dmaobj_init(struct nouveau_gpuobj *, u32 memtype, u64 base,
u64 size);
int nv50_evo_dmaobj_new(struct nouveau_channel *, u32 handle, u32 memtype,
u64 base, u64 size, struct nouveau_gpuobj **);
int nvd0_display_create(struct drm_device *);
void nvd0_display_destroy(struct drm_device *);
......@@ -99,7 +40,6 @@ void nvd0_display_flip_stop(struct drm_crtc *);
int nvd0_display_flip_next(struct drm_crtc *, struct drm_framebuffer *,
struct nouveau_channel *, u32 swap_interval);
struct nouveau_bo *nv50_display_crtc_sema(struct drm_device *, int head);
struct nouveau_bo *nvd0_display_crtc_sema(struct drm_device *, int head);
#endif /* __NV50_DISPLAY_H__ */
drivers/gpu/drm/nouveau/nv50_evo.c deleted 100644 → 0
View file @ f9887d09
This diff is collapsed.
drivers/gpu/drm/nouveau/nv50_evo.h deleted 100644 → 0
View file @ f9887d09
/*
* Copyright (C) 2008 Maarten Maathuis.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __NV50_EVO_H__
#define __NV50_EVO_H__
#define NV50_EVO_UPDATE 0x00000080
#define NV50_EVO_UNK84 0x00000084
#define NV50_EVO_UNK84_NOTIFY 0x40000000
#define NV50_EVO_UNK84_NOTIFY_DISABLED 0x00000000
#define NV50_EVO_UNK84_NOTIFY_ENABLED 0x40000000
#define NV50_EVO_DMA_NOTIFY 0x00000088
#define NV50_EVO_DMA_NOTIFY_HANDLE 0xffffffff
#define NV50_EVO_DMA_NOTIFY_HANDLE_NONE 0x00000000
#define NV50_EVO_UNK8C 0x0000008C
#define NV50_EVO_DAC(n, r) ((n) * 0x80 + NV50_EVO_DAC_##r)
#define NV50_EVO_DAC_MODE_CTRL 0x00000400
#define NV50_EVO_DAC_MODE_CTRL_CRTC0 0x00000001
#define NV50_EVO_DAC_MODE_CTRL_CRTC1 0x00000002
#define NV50_EVO_DAC_MODE_CTRL2 0x00000404
#define NV50_EVO_DAC_MODE_CTRL2_NHSYNC 0x00000001
#define NV50_EVO_DAC_MODE_CTRL2_NVSYNC 0x00000002
#define NV50_EVO_SOR(n, r) ((n) * 0x40 + NV50_EVO_SOR_##r)
#define NV50_EVO_SOR_MODE_CTRL 0x00000600
#define NV50_EVO_SOR_MODE_CTRL_CRTC0 0x00000001
#define NV50_EVO_SOR_MODE_CTRL_CRTC1 0x00000002
#define NV50_EVO_SOR_MODE_CTRL_TMDS 0x00000100
#define NV50_EVO_SOR_MODE_CTRL_TMDS_DUAL_LINK 0x00000400
#define NV50_EVO_SOR_MODE_CTRL_NHSYNC 0x00001000
#define NV50_EVO_SOR_MODE_CTRL_NVSYNC 0x00002000
#define NV50_EVO_CRTC(n, r) ((n) * 0x400 + NV50_EVO_CRTC_##r)
#define NV84_EVO_CRTC(n, r) ((n) * 0x400 + NV84_EVO_CRTC_##r)
#define NV50_EVO_CRTC_UNK0800 0x00000800
#define NV50_EVO_CRTC_CLOCK 0x00000804
#define NV50_EVO_CRTC_INTERLACE 0x00000808
#define NV50_EVO_CRTC_DISPLAY_START 0x00000810
#define NV50_EVO_CRTC_DISPLAY_TOTAL 0x00000814
#define NV50_EVO_CRTC_SYNC_DURATION 0x00000818
#define NV50_EVO_CRTC_SYNC_START_TO_BLANK_END 0x0000081c
#define NV50_EVO_CRTC_UNK0820 0x00000820
#define NV50_EVO_CRTC_UNK0824 0x00000824
#define NV50_EVO_CRTC_UNK082C 0x0000082c
#define NV50_EVO_CRTC_CLUT_MODE 0x00000840
/* You can't have a palette in 8 bit mode (=OFF) */
#define NV50_EVO_CRTC_CLUT_MODE_BLANK 0x00000000
#define NV50_EVO_CRTC_CLUT_MODE_OFF 0x80000000
#define NV50_EVO_CRTC_CLUT_MODE_ON 0xC0000000
#define NV50_EVO_CRTC_CLUT_OFFSET 0x00000844
#define NV84_EVO_CRTC_CLUT_DMA 0x0000085C
#define NV84_EVO_CRTC_CLUT_DMA_HANDLE 0xffffffff
#define NV84_EVO_CRTC_CLUT_DMA_HANDLE_NONE 0x00000000
#define NV50_EVO_CRTC_FB_OFFSET 0x00000860
#define NV50_EVO_CRTC_FB_SIZE 0x00000868
#define NV50_EVO_CRTC_FB_CONFIG 0x0000086c
#define NV50_EVO_CRTC_FB_CONFIG_MODE 0x00100000
#define NV50_EVO_CRTC_FB_CONFIG_MODE_TILE 0x00000000
#define NV50_EVO_CRTC_FB_CONFIG_MODE_PITCH 0x00100000
#define NV50_EVO_CRTC_FB_DEPTH 0x00000870
#define NV50_EVO_CRTC_FB_DEPTH_8 0x00001e00
#define NV50_EVO_CRTC_FB_DEPTH_15 0x0000e900
#define NV50_EVO_CRTC_FB_DEPTH_16 0x0000e800
#define NV50_EVO_CRTC_FB_DEPTH_24 0x0000cf00
#define NV50_EVO_CRTC_FB_DEPTH_30 0x0000d100
#define NV50_EVO_CRTC_FB_DMA 0x00000874
#define NV50_EVO_CRTC_FB_DMA_HANDLE 0xffffffff
#define NV50_EVO_CRTC_FB_DMA_HANDLE_NONE 0x00000000
#define NV50_EVO_CRTC_CURSOR_CTRL 0x00000880
#define NV50_EVO_CRTC_CURSOR_CTRL_HIDE 0x05000000
#define NV50_EVO_CRTC_CURSOR_CTRL_SHOW 0x85000000
#define NV50_EVO_CRTC_CURSOR_OFFSET 0x00000884
#define NV84_EVO_CRTC_CURSOR_DMA 0x0000089c
#define NV84_EVO_CRTC_CURSOR_DMA_HANDLE 0xffffffff
#define NV84_EVO_CRTC_CURSOR_DMA_HANDLE_NONE 0x00000000
#define NV50_EVO_CRTC_DITHER_CTRL 0x000008a0
#define NV50_EVO_CRTC_DITHER_CTRL_OFF 0x00000000
#define NV50_EVO_CRTC_DITHER_CTRL_ON 0x00000011
#define NV50_EVO_CRTC_SCALE_CTRL 0x000008a4
#define NV50_EVO_CRTC_SCALE_CTRL_INACTIVE 0x00000000
#define NV50_EVO_CRTC_SCALE_CTRL_ACTIVE 0x00000009
#define NV50_EVO_CRTC_COLOR_CTRL 0x000008a8
#define NV50_EVO_CRTC_COLOR_CTRL_VIBRANCE 0x000fff00
#define NV50_EVO_CRTC_COLOR_CTRL_HUE 0xfff00000
#define NV50_EVO_CRTC_FB_POS 0x000008c0
#define NV50_EVO_CRTC_REAL_RES 0x000008c8
#define NV50_EVO_CRTC_SCALE_CENTER_OFFSET 0x000008d4
#define NV50_EVO_CRTC_SCALE_CENTER_OFFSET_VAL(x, y) \
((((unsigned)y << 16) & 0xFFFF0000) | (((unsigned)x) & 0x0000FFFF))
/* Both of these are needed, otherwise nothing happens. */
#define NV50_EVO_CRTC_SCALE_RES1 0x000008d8
#define NV50_EVO_CRTC_SCALE_RES2 0x000008dc
#define NV50_EVO_CRTC_UNK900 0x00000900
#define NV50_EVO_CRTC_UNK904 0x00000904
#endif
drivers/gpu/drm/nouveau/nv50_fence.c
View file @ 4f6029da
......@@ -70,7 +70,7 @@ nv50_fence_context_new(struct nouveau_channel *chan)
/* dma objects for display sync channel semaphore blocks */
for (i = 0; !ret && i < dev->mode_config.num_crtc; i++) {
struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i);
struct nouveau_bo *bo = nvd0_display_crtc_sema(dev, i);
ret = nouveau_object_new(nv_object(chan->cli), chan->handle,
NvEvoSema0 + i, 0x003d,
......
drivers/gpu/drm/nouveau/nv50_pm.c
View file @ 4f6029da
......@@ -546,7 +546,7 @@ calc_mclk(struct drm_device *dev, struct nouveau_pm_level *perflvl,
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nouveau_device *device = nouveau_dev(dev);
u32 crtc_mask = nv50_display_active_crtcs(dev);
u32 crtc_mask = 0; /*XXX: nv50_display_active_crtcs(dev); */
struct nouveau_mem_exec_func exec = {
.dev = dev,
.precharge = mclk_precharge,
......
drivers/gpu/drm/nouveau/nv50_sor.c deleted 100644 → 0
View file @ f9887d09
/*
* Copyright (C) 2008 Maarten Maathuis.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
#include "nouveau_reg.h"
#include "nouveau_drm.h"
#include "nouveau_dma.h"
#include "nouveau_encoder.h"
#include "nouveau_connector.h"
#include "nouveau_crtc.h"
#include "nv50_display.h"
#include <core/class.h>
#include <subdev/timer.h>
static void
nv50_sor_disconnect(struct drm_encoder *encoder)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
struct drm_device *dev = encoder->dev;
struct nouveau_channel *evo = nv50_display(dev)->master;
int ret;
if (!nv_encoder->crtc)
return;
nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
NV_DEBUG(drm, "Disconnecting SOR %d\n", nv_encoder->or);
ret = RING_SPACE(evo, 4);
if (ret) {
NV_ERROR(drm, "no space while disconnecting SOR\n");
return;
}
BEGIN_NV04(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
OUT_RING (evo, 0);
BEGIN_NV04(evo, 0, NV50_EVO_UPDATE, 1);
OUT_RING (evo, 0);
nouveau_hdmi_mode_set(encoder, NULL);
nv_encoder->crtc = NULL;
nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
}
static void
nv50_sor_dpms(struct drm_encoder *encoder, int mode)
{
struct nv50_display *priv = nv50_display(encoder->dev);
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
struct drm_device *dev = encoder->dev;
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct drm_encoder *enc;
int or = nv_encoder->or;
NV_DEBUG(drm, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode);
nv_encoder->last_dpms = mode;
list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
struct nouveau_encoder *nvenc = nouveau_encoder(enc);
if (nvenc == nv_encoder ||
(nvenc->dcb->type != DCB_OUTPUT_TMDS &&
nvenc->dcb->type != DCB_OUTPUT_LVDS &&
nvenc->dcb->type != DCB_OUTPUT_DP) ||
nvenc->dcb->or != nv_encoder->dcb->or)
continue;
if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
return;
}
nv_call(priv->core, NV50_DISP_SOR_PWR + or, (mode == DRM_MODE_DPMS_ON));
if (nv_encoder->dcb->type == DCB_OUTPUT_DP)
nouveau_dp_dpms(encoder, mode, nv_encoder->dp.datarate, priv->core);
}
static void
nv50_sor_save(struct drm_encoder *encoder)
{
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
NV_ERROR(drm, "!!\n");
}
static void
nv50_sor_restore(struct drm_encoder *encoder)
{
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
NV_ERROR(drm, "!!\n");
}
static bool
nv50_sor_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_connector *connector;
NV_DEBUG(drm, "or %d\n", nv_encoder->or);
connector = nouveau_encoder_connector_get(nv_encoder);
if (!connector) {
NV_ERROR(drm, "Encoder has no connector\n");
return false;
}
if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
connector->native_mode)
drm_mode_copy(adjusted_mode, connector->native_mode);
return true;
}
static void
nv50_sor_prepare(struct drm_encoder *encoder)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv50_sor_disconnect(encoder);
if (nv_encoder->dcb->type == DCB_OUTPUT_DP) {
/* avoid race between link training and supervisor intr */
nv50_display_sync(encoder->dev);
}
}
static void
nv50_sor_commit(struct drm_encoder *encoder)
{
}
static void
nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
struct drm_display_mode *mode)
{
struct nouveau_channel *evo = nv50_display(encoder->dev)->master;
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
struct nouveau_drm *drm = nouveau_drm(encoder->dev);
struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
struct nouveau_connector *nv_connector;
struct nv50_display *disp = nv50_display(encoder->dev);
struct nvbios *bios = &drm->vbios;
uint32_t mode_ctl = 0, script;
int ret;
NV_DEBUG(drm, "or %d type %d -> crtc %d\n",
nv_encoder->or, nv_encoder->dcb->type, crtc->index);
nv_encoder->crtc = encoder->crtc;
switch (nv_encoder->dcb->type) {
case DCB_OUTPUT_TMDS:
if (nv_encoder->dcb->sorconf.link & 1) {
if (mode->clock < 165000)
mode_ctl = 0x0100;
else
mode_ctl = 0x0500;
} else
mode_ctl = 0x0200;
nouveau_hdmi_mode_set(encoder, mode);
break;
case DCB_OUTPUT_LVDS:
script = 0x0000;
if (bios->fp_no_ddc) {
if (bios->fp.dual_link)
script |= 0x0100;
if (bios->fp.if_is_24bit)
script |= 0x0200;
} else {
/* determine number of lvds links */
nv_connector = nouveau_encoder_connector_get(nv_encoder);
if (nv_connector && nv_connector->edid &&
nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) {
/* http://www.spwg.org */
if (((u8 *)nv_connector->edid)[121] == 2)
script |= 0x0100;
} else
if (mode->clock >= bios->fp.duallink_transition_clk) {
script |= 0x0100;
}
/* determine panel depth */
if (script & 0x0100) {
if (bios->fp.strapless_is_24bit & 2)
script |= 0x0200;
} else {
if (bios->fp.strapless_is_24bit & 1)
script |= 0x0200;
}
if (nv_connector && nv_connector->edid &&
(nv_connector->edid->revision >= 4) &&
(nv_connector->edid->input & 0x70) >= 0x20)
script |= 0x0200;
}
nv_call(disp->core, NV50_DISP_SOR_LVDS_SCRIPT + nv_encoder->or, script);
break;
case DCB_OUTPUT_DP:
nv_connector = nouveau_encoder_connector_get(nv_encoder);
if (nv_connector && nv_connector->base.display_info.bpc == 6) {
nv_encoder->dp.datarate = mode->clock * 18 / 8;
mode_ctl |= 0x00020000;
} else {
nv_encoder->dp.datarate = mode->clock * 24 / 8;
mode_ctl |= 0x00050000;
}
if (nv_encoder->dcb->sorconf.link & 1)
mode_ctl |= 0x00000800;
else
mode_ctl |= 0x00000900;
break;
default:
break;
}
if (crtc->index == 1)
mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
else
mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
if (mode->flags & DRM_MODE_FLAG_NHSYNC)
mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
if (mode->flags & DRM_MODE_FLAG_NVSYNC)
mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
ret = RING_SPACE(evo, 2);
if (ret) {
NV_ERROR(drm, "no space while connecting SOR\n");
nv_encoder->crtc = NULL;
return;
}
BEGIN_NV04(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
OUT_RING(evo, mode_ctl);
}
static struct drm_crtc *
nv50_sor_crtc_get(struct drm_encoder *encoder)
{
return nouveau_encoder(encoder)->crtc;
}
static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
.dpms = nv50_sor_dpms,
.save = nv50_sor_save,
.restore = nv50_sor_restore,
.mode_fixup = nv50_sor_mode_fixup,
.prepare = nv50_sor_prepare,
.commit = nv50_sor_commit,
.mode_set = nv50_sor_mode_set,
.get_crtc = nv50_sor_crtc_get,
.detect = NULL,
.disable = nv50_sor_disconnect
};
static void
nv50_sor_destroy(struct drm_encoder *encoder)
{
struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
drm_encoder_cleanup(encoder);
kfree(nv_encoder);
}
static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
.destroy = nv50_sor_destroy,
};
int
nv50_sor_create(struct drm_connector *connector, struct dcb_output *entry)
{
struct nouveau_encoder *nv_encoder = NULL;
struct drm_device *dev = connector->dev;
struct drm_encoder *encoder;
int type;
switch (entry->type) {
case DCB_OUTPUT_TMDS:
case DCB_OUTPUT_DP:
type = DRM_MODE_ENCODER_TMDS;
break;
case DCB_OUTPUT_LVDS:
type = DRM_MODE_ENCODER_LVDS;
break;
default:
return -EINVAL;
}
nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
if (!nv_encoder)
return -ENOMEM;
encoder = to_drm_encoder(nv_encoder);
nv_encoder->dcb = entry;
nv_encoder->or = ffs(entry->or) - 1;
nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
encoder->possible_crtcs = entry->heads;
encoder->possible_clones = 0;
drm_mode_connector_attach_encoder(connector, encoder);
return 0;
}
drivers/gpu/drm/nouveau/nv84_fence.c
View file @ 4f6029da
......@@ -127,7 +127,7 @@ nv84_fence_context_new(struct nouveau_channel *chan)
/* dma objects for display sync channel semaphore blocks */
for (i = 0; !ret && i < dev->mode_config.num_crtc; i++) {
struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i);
struct nouveau_bo *bo = nvd0_display_crtc_sema(dev, i);
ret = nouveau_object_new(nv_object(chan->cli), chan->handle,
NvEvoSema0 + i, 0x003d,
......
drivers/gpu/drm/nouveau/nvc0_fence.c
View file @ 4f6029da
......@@ -114,17 +114,9 @@ nvc0_fence_context_del(struct nouveau_channel *chan)
struct nvc0_fence_chan *fctx = chan->fence;
int i;
if (nv_device(chan->drm->device)->card_type >= NV_D0) {
for (i = 0; i < dev->mode_config.num_crtc; i++) {
struct nouveau_bo *bo = nvd0_display_crtc_sema(dev, i);
nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]);
}
} else
if (nv_device(chan->drm->device)->card_type >= NV_50) {
for (i = 0; i < dev->mode_config.num_crtc; i++) {
struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i);
nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]);
}
for (i = 0; i < dev->mode_config.num_crtc; i++) {
struct nouveau_bo *bo = nvd0_display_crtc_sema(dev, i);
nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]);
}
nouveau_bo_vma_del(priv->bo, &fctx->vma);
......@@ -154,12 +146,7 @@ nvc0_fence_context_new(struct nouveau_channel *chan)
/* map display semaphore buffers into channel's vm */
for (i = 0; !ret && i < chan->drm->dev->mode_config.num_crtc; i++) {
struct nouveau_bo *bo;
if (nv_device(chan->drm->device)->card_type >= NV_D0)
bo = nvd0_display_crtc_sema(chan->drm->dev, i);
else
bo = nv50_display_crtc_sema(chan->drm->dev, i);
struct nouveau_bo *bo = nvd0_display_crtc_sema(chan->drm->dev, i);
ret = nouveau_bo_vma_add(bo, client->vm, &fctx->dispc_vma[i]);
}
......
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