Commit 503a7c6f authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher

drm/amd/display: Use function pointer for update_plane_addr

Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b8e9eb72
...@@ -132,7 +132,7 @@ struct resource_pool *dc_create_resource_pool( ...@@ -132,7 +132,7 @@ struct resource_pool *dc_create_resource_pool(
#if defined(CONFIG_DRM_AMD_DC_DCN1_0) #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
case DCN_VERSION_1_0: case DCN_VERSION_1_0:
res_pool = dcn10_create_resource_pool( res_pool = dcn10_create_resource_pool(
num_virtual_links, dc); num_virtual_links, dc);
break; break;
#endif #endif
......
...@@ -615,6 +615,7 @@ static uint32_t dce110_get_pll_pixel_rate_in_hz( ...@@ -615,6 +615,7 @@ static uint32_t dce110_get_pll_pixel_rate_in_hz(
/* This function need separate to different DCE version, before separate, just use pixel clock */ /* This function need separate to different DCE version, before separate, just use pixel clock */
return pipe_ctx->stream->phy_pix_clk; return pipe_ctx->stream->phy_pix_clk;
} }
static uint32_t dce110_get_dp_pixel_rate_from_combo_phy_pll( static uint32_t dce110_get_dp_pixel_rate_from_combo_phy_pll(
......
...@@ -1246,7 +1246,7 @@ static void toggle_watermark_change_req(struct dce_hwseq *hws) ...@@ -1246,7 +1246,7 @@ static void toggle_watermark_change_req(struct dce_hwseq *hws)
DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, watermark_change_req); DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, watermark_change_req);
} }
static void update_plane_addr(const struct core_dc *dc, struct pipe_ctx *pipe_ctx) static void dcn10_update_plane_addr(const struct core_dc *dc, struct pipe_ctx *pipe_ctx)
{ {
bool addr_patched = false; bool addr_patched = false;
PHYSICAL_ADDRESS_LOC addr; PHYSICAL_ADDRESS_LOC addr;
...@@ -2115,7 +2115,7 @@ static void update_dchubp_dpp( ...@@ -2115,7 +2115,7 @@ static void update_dchubp_dpp(
*/ */
REG_UPDATE(DCHUBP_CNTL[pipe_ctx->pipe_idx], HUBP_VTG_SEL, pipe_ctx->stream_res.tg->inst); REG_UPDATE(DCHUBP_CNTL[pipe_ctx->pipe_idx], HUBP_VTG_SEL, pipe_ctx->stream_res.tg->inst);
update_plane_addr(dc, pipe_ctx); dc->hwss.update_plane_addr(dc, pipe_ctx);
mi->funcs->mem_input_setup( mi->funcs->mem_input_setup(
mi, mi,
...@@ -2687,7 +2687,7 @@ static const struct hw_sequencer_funcs dcn10_funcs = { ...@@ -2687,7 +2687,7 @@ static const struct hw_sequencer_funcs dcn10_funcs = {
.apply_ctx_to_hw = dce110_apply_ctx_to_hw, .apply_ctx_to_hw = dce110_apply_ctx_to_hw,
.apply_ctx_for_surface = dcn10_apply_ctx_for_surface, .apply_ctx_for_surface = dcn10_apply_ctx_for_surface,
.set_plane_config = set_plane_config, .set_plane_config = set_plane_config,
.update_plane_addr = update_plane_addr, .update_plane_addr = dcn10_update_plane_addr,
.update_dchub = dcn10_update_dchub, .update_dchub = dcn10_update_dchub,
.update_pending_status = dcn10_update_pending_status, .update_pending_status = dcn10_update_pending_status,
.set_input_transfer_func = dcn10_set_input_transfer_func, .set_input_transfer_func = dcn10_set_input_transfer_func,
......
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