Commit 52111672 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Stephen Boyd

clk: qcom: gdsc: Add GDSCs in msm8996 GCC

Add all data for the GDSCs which are part of msm8996 GCC block
Signed-off-by: default avatarRajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent a823bb9f
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#include "clk-rcg.h" #include "clk-rcg.h"
#include "clk-branch.h" #include "clk-branch.h"
#include "reset.h" #include "reset.h"
#include "gdsc.h"
#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) } #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
...@@ -3059,6 +3060,83 @@ static struct clk_hw *gcc_msm8996_hws[] = { ...@@ -3059,6 +3060,83 @@ static struct clk_hw *gcc_msm8996_hws[] = {
&ufs_ice_core_postdiv_clk_src.hw, &ufs_ice_core_postdiv_clk_src.hw,
}; };
static struct gdsc aggre0_noc_gdsc = {
.gdscr = 0x81004,
.gds_hw_ctrl = 0x81028,
.pd = {
.name = "aggre0_noc",
},
.pwrsts = PWRSTS_OFF_ON,
.flags = VOTABLE,
};
static struct gdsc hlos1_vote_aggre0_noc_gdsc = {
.gdscr = 0x7d024,
.pd = {
.name = "hlos1_vote_aggre0_noc",
},
.pwrsts = PWRSTS_OFF_ON,
.flags = VOTABLE,
};
static struct gdsc hlos1_vote_lpass_adsp_gdsc = {
.gdscr = 0x7d034,
.pd = {
.name = "hlos1_vote_lpass_adsp",
},
.pwrsts = PWRSTS_OFF_ON,
.flags = VOTABLE,
};
static struct gdsc hlos1_vote_lpass_core_gdsc = {
.gdscr = 0x7d038,
.pd = {
.name = "hlos1_vote_lpass_core",
},
.pwrsts = PWRSTS_OFF_ON,
.flags = VOTABLE,
};
static struct gdsc usb30_gdsc = {
.gdscr = 0xf004,
.pd = {
.name = "usb30",
},
.pwrsts = PWRSTS_OFF_ON,
};
static struct gdsc pcie0_gdsc = {
.gdscr = 0x6b004,
.pd = {
.name = "pcie0",
},
.pwrsts = PWRSTS_OFF_ON,
};
static struct gdsc pcie1_gdsc = {
.gdscr = 0x6d004,
.pd = {
.name = "pcie1",
},
.pwrsts = PWRSTS_OFF_ON,
};
static struct gdsc pcie2_gdsc = {
.gdscr = 0x6e004,
.pd = {
.name = "pcie2",
},
.pwrsts = PWRSTS_OFF_ON,
};
static struct gdsc ufs_gdsc = {
.gdscr = 0x75004,
.pd = {
.name = "ufs",
},
.pwrsts = PWRSTS_OFF_ON,
};
static struct clk_regmap *gcc_msm8996_clocks[] = { static struct clk_regmap *gcc_msm8996_clocks[] = {
[GPLL0_EARLY] = &gpll0_early.clkr, [GPLL0_EARLY] = &gpll0_early.clkr,
[GPLL0] = &gpll0.clkr, [GPLL0] = &gpll0.clkr,
...@@ -3245,6 +3323,18 @@ static struct clk_regmap *gcc_msm8996_clocks[] = { ...@@ -3245,6 +3323,18 @@ static struct clk_regmap *gcc_msm8996_clocks[] = {
[GCC_RX1_USB2_CLKREF_CLK] = &gcc_rx1_usb2_clkref_clk.clkr, [GCC_RX1_USB2_CLKREF_CLK] = &gcc_rx1_usb2_clkref_clk.clkr,
}; };
static struct gdsc *gcc_msm8996_gdscs[] = {
[AGGRE0_NOC_GDSC] = &aggre0_noc_gdsc,
[HLOS1_VOTE_AGGRE0_NOC_GDSC] = &hlos1_vote_aggre0_noc_gdsc,
[HLOS1_VOTE_LPASS_ADSP_GDSC] = &hlos1_vote_lpass_adsp_gdsc,
[HLOS1_VOTE_LPASS_CORE_GDSC] = &hlos1_vote_lpass_core_gdsc,
[USB30_GDSC] = &usb30_gdsc,
[PCIE0_GDSC] = &pcie0_gdsc,
[PCIE1_GDSC] = &pcie1_gdsc,
[PCIE2_GDSC] = &pcie2_gdsc,
[UFS_GDSC] = &ufs_gdsc,
};
static const struct qcom_reset_map gcc_msm8996_resets[] = { static const struct qcom_reset_map gcc_msm8996_resets[] = {
[GCC_SYSTEM_NOC_BCR] = { 0x4000 }, [GCC_SYSTEM_NOC_BCR] = { 0x4000 },
[GCC_CONFIG_NOC_BCR] = { 0x5000 }, [GCC_CONFIG_NOC_BCR] = { 0x5000 },
...@@ -3363,6 +3453,8 @@ static const struct qcom_cc_desc gcc_msm8996_desc = { ...@@ -3363,6 +3453,8 @@ static const struct qcom_cc_desc gcc_msm8996_desc = {
.num_clks = ARRAY_SIZE(gcc_msm8996_clocks), .num_clks = ARRAY_SIZE(gcc_msm8996_clocks),
.resets = gcc_msm8996_resets, .resets = gcc_msm8996_resets,
.num_resets = ARRAY_SIZE(gcc_msm8996_resets), .num_resets = ARRAY_SIZE(gcc_msm8996_resets),
.gdscs = gcc_msm8996_gdscs,
.num_gdscs = ARRAY_SIZE(gcc_msm8996_gdscs),
}; };
static const struct of_device_id gcc_msm8996_match_table[] = { static const struct of_device_id gcc_msm8996_match_table[] = {
......
...@@ -336,4 +336,15 @@ ...@@ -336,4 +336,15 @@
#define GCC_MSS_Q6_BCR 99 #define GCC_MSS_Q6_BCR 99
#define GCC_QREFS_VBG_CAL_BCR 100 #define GCC_QREFS_VBG_CAL_BCR 100
/* Indexes for GDSCs */
#define AGGRE0_NOC_GDSC 0
#define HLOS1_VOTE_AGGRE0_NOC_GDSC 1
#define HLOS1_VOTE_LPASS_ADSP_GDSC 2
#define HLOS1_VOTE_LPASS_CORE_GDSC 3
#define USB30_GDSC 4
#define PCIE0_GDSC 5
#define PCIE1_GDSC 6
#define PCIE2_GDSC 7
#define UFS_GDSC 8
#endif #endif
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment