Commit 52f025ef authored by Eugeni Dodonov's avatar Eugeni Dodonov Committed by Daniel Vetter

drm/i915: add PIXCLK_GATE register

Pixel clock gating control for Lynx point.
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 7501a4d8
...@@ -4128,4 +4128,10 @@ ...@@ -4128,4 +4128,10 @@
#define SBI_RESPONSE_SUCCESS (0x0<<1) #define SBI_RESPONSE_SUCCESS (0x0<<1)
#define SBI_BUSY (0x1<<0) #define SBI_BUSY (0x1<<0)
#define SBI_READY (0x0<<0) #define SBI_READY (0x0<<0)
/* LPT PIXCLK_GATE */
#define PIXCLK_GATE 0xC6020
#define PIXCLK_GATE_UNGATE 1<<0
#define PIXCLK_GATE_GATE 0<<0
#endif /* _I915_REG_H_ */ #endif /* _I915_REG_H_ */
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