Commit 5382bfb9 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_tiocmd: use a local var for the 'counter_index'

Use a local variable for the 'counter->counter_index' to help shorten the
long lines and ugly line breaks.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e6b1624a
...@@ -57,6 +57,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable, ...@@ -57,6 +57,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
short read_not_write) short read_not_write)
{ {
struct ni_gpct_device *counter_dev = counter->counter_dev; struct ni_gpct_device *counter_dev = counter->counter_dev;
unsigned cidx = counter->counter_index;
unsigned input_select_bits = 0; unsigned input_select_bits = 0;
if (enable) { if (enable) {
...@@ -65,8 +66,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable, ...@@ -65,8 +66,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
else else
input_select_bits |= Gi_Write_Acknowledges_Irq; input_select_bits |= Gi_Write_Acknowledges_Irq;
} }
ni_tio_set_bits(counter, ni_tio_set_bits(counter, NITIO_INPUT_SEL_REG(cidx),
NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq, Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq,
input_select_bits); input_select_bits);
switch (counter_dev->variant) { switch (counter_dev->variant) {
...@@ -83,9 +83,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable, ...@@ -83,9 +83,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
} }
if (read_not_write == 0) if (read_not_write == 0)
gi_dma_config_bits |= Gi_DMA_Write_Bit; gi_dma_config_bits |= Gi_DMA_Write_Bit;
ni_tio_set_bits(counter, ni_tio_set_bits(counter, NITIO_DMA_CFG_REG(cidx),
NITIO_DMA_CFG_REG(counter->
counter_index),
Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit | Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit |
Gi_DMA_Write_Bit, gi_dma_config_bits); Gi_DMA_Write_Bit, gi_dma_config_bits);
} }
...@@ -122,6 +120,7 @@ static int ni_tio_input_inttrig(struct comedi_device *dev, ...@@ -122,6 +120,7 @@ static int ni_tio_input_inttrig(struct comedi_device *dev,
static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async) static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async)
{ {
struct ni_gpct_device *counter_dev = counter->counter_dev; struct ni_gpct_device *counter_dev = counter->counter_dev;
unsigned cidx = counter->counter_index;
struct comedi_cmd *cmd = &async->cmd; struct comedi_cmd *cmd = &async->cmd;
int retval = 0; int retval = 0;
...@@ -140,8 +139,7 @@ static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async) ...@@ -140,8 +139,7 @@ static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async)
BUG(); BUG();
break; break;
} }
ni_tio_set_bits(counter, NITIO_CMD_REG(counter->counter_index), ni_tio_set_bits(counter, NITIO_CMD_REG(cidx), Gi_Save_Trace_Bit, 0);
Gi_Save_Trace_Bit, 0);
ni_tio_configure_dma(counter, 1, 1); ni_tio_configure_dma(counter, 1, 1);
switch (cmd->start_src) { switch (cmd->start_src) {
case TRIG_NOW: case TRIG_NOW:
...@@ -185,6 +183,7 @@ static int ni_tio_output_cmd(struct ni_gpct *counter, ...@@ -185,6 +183,7 @@ static int ni_tio_output_cmd(struct ni_gpct *counter,
static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async) static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async)
{ {
struct comedi_cmd *cmd = &async->cmd; struct comedi_cmd *cmd = &async->cmd;
unsigned cidx = counter->counter_index;
int set_gate_source = 0; int set_gate_source = 0;
unsigned gate_source; unsigned gate_source;
int retval = 0; int retval = 0;
...@@ -199,13 +198,9 @@ static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async) ...@@ -199,13 +198,9 @@ static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async)
if (set_gate_source) if (set_gate_source)
retval = ni_tio_set_gate_src(counter, 0, gate_source); retval = ni_tio_set_gate_src(counter, 0, gate_source);
if (cmd->flags & TRIG_WAKE_EOS) { if (cmd->flags & TRIG_WAKE_EOS) {
ni_tio_set_bits(counter, ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx),
NITIO_INT_ENA_REG(counter-> Gi_Gate_Interrupt_Enable_Bit(cidx),
counter_index), Gi_Gate_Interrupt_Enable_Bit(cidx));
Gi_Gate_Interrupt_Enable_Bit(counter->
counter_index),
Gi_Gate_Interrupt_Enable_Bit(counter->
counter_index));
} }
return retval; return retval;
} }
...@@ -301,6 +296,7 @@ EXPORT_SYMBOL_GPL(ni_tio_cmdtest); ...@@ -301,6 +296,7 @@ EXPORT_SYMBOL_GPL(ni_tio_cmdtest);
int ni_tio_cancel(struct ni_gpct *counter) int ni_tio_cancel(struct ni_gpct *counter)
{ {
unsigned cidx = counter->counter_index;
unsigned long flags; unsigned long flags;
ni_tio_arm(counter, 0, 0); ni_tio_arm(counter, 0, 0);
...@@ -310,10 +306,8 @@ int ni_tio_cancel(struct ni_gpct *counter) ...@@ -310,10 +306,8 @@ int ni_tio_cancel(struct ni_gpct *counter)
spin_unlock_irqrestore(&counter->lock, flags); spin_unlock_irqrestore(&counter->lock, flags);
ni_tio_configure_dma(counter, 0, 0); ni_tio_configure_dma(counter, 0, 0);
ni_tio_set_bits(counter, ni_tio_set_bits(counter, NITIO_INT_ENA_REG(cidx),
NITIO_INT_ENA_REG(counter->counter_index), Gi_Gate_Interrupt_Enable_Bit(cidx), 0x0);
Gi_Gate_Interrupt_Enable_Bit(counter->counter_index),
0x0);
return 0; return 0;
} }
EXPORT_SYMBOL_GPL(ni_tio_cancel); EXPORT_SYMBOL_GPL(ni_tio_cancel);
...@@ -353,14 +347,11 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error, ...@@ -353,14 +347,11 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
int *tc_error, int *perm_stale_data, int *tc_error, int *perm_stale_data,
int *stale_data) int *stale_data)
{ {
unsigned cidx = counter->counter_index;
const unsigned short gxx_status = read_register(counter, const unsigned short gxx_status = read_register(counter,
NITIO_SHARED_STATUS_REG NITIO_SHARED_STATUS_REG(cidx));
(counter->
counter_index));
const unsigned short gi_status = read_register(counter, const unsigned short gi_status = read_register(counter,
NITIO_STATUS_REG NITIO_STATUS_REG(cidx));
(counter->
counter_index));
unsigned ack = 0; unsigned ack = 0;
if (gate_error) if (gate_error)
...@@ -372,8 +363,8 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error, ...@@ -372,8 +363,8 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
if (stale_data) if (stale_data)
*stale_data = 0; *stale_data = 0;
if (gxx_status & Gi_Gate_Error_Bit(counter->counter_index)) { if (gxx_status & Gi_Gate_Error_Bit(cidx)) {
ack |= Gi_Gate_Error_Confirm_Bit(counter->counter_index); ack |= Gi_Gate_Error_Confirm_Bit(cidx);
if (gate_error) { if (gate_error) {
/*660x don't support automatic acknowledgement /*660x don't support automatic acknowledgement
of gate interrupt via dma read/write of gate interrupt via dma read/write
...@@ -384,8 +375,8 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error, ...@@ -384,8 +375,8 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
} }
} }
} }
if (gxx_status & Gi_TC_Error_Bit(counter->counter_index)) { if (gxx_status & Gi_TC_Error_Bit(cidx)) {
ack |= Gi_TC_Error_Confirm_Bit(counter->counter_index); ack |= Gi_TC_Error_Confirm_Bit(cidx);
if (tc_error) if (tc_error)
*tc_error = 1; *tc_error = 1;
} }
...@@ -396,21 +387,15 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error, ...@@ -396,21 +387,15 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
ack |= Gi_Gate_Interrupt_Ack_Bit; ack |= Gi_Gate_Interrupt_Ack_Bit;
} }
if (ack) if (ack)
write_register(counter, ack, write_register(counter, ack, NITIO_INT_ACK_REG(cidx));
NITIO_INT_ACK_REG if (ni_tio_get_soft_copy(counter, NITIO_MODE_REG(cidx)) &
(counter->counter_index));
if (ni_tio_get_soft_copy
(counter,
NITIO_MODE_REG(counter->counter_index)) &
Gi_Loading_On_Gate_Bit) { Gi_Loading_On_Gate_Bit) {
if (gxx_status & Gi_Stale_Data_Bit(counter->counter_index)) { if (gxx_status & Gi_Stale_Data_Bit(cidx)) {
if (stale_data) if (stale_data)
*stale_data = 1; *stale_data = 1;
} }
if (read_register(counter, if (read_register(counter, NITIO_STATUS2_REG(cidx)) &
NITIO_STATUS2_REG Gi_Permanent_Stale_Bit(cidx)) {
(counter->counter_index)) &
Gi_Permanent_Stale_Bit(counter->counter_index)) {
dev_info(counter->counter_dev->dev->class_dev, dev_info(counter->counter_dev->dev->class_dev,
"%s: Gi_Permanent_Stale_Data detected.\n", "%s: Gi_Permanent_Stale_Data detected.\n",
__func__); __func__);
...@@ -424,6 +409,7 @@ EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm); ...@@ -424,6 +409,7 @@ EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm);
void ni_tio_handle_interrupt(struct ni_gpct *counter, void ni_tio_handle_interrupt(struct ni_gpct *counter,
struct comedi_subdevice *s) struct comedi_subdevice *s)
{ {
unsigned cidx = counter->counter_index;
unsigned gpct_mite_status; unsigned gpct_mite_status;
unsigned long flags; unsigned long flags;
int gate_error; int gate_error;
...@@ -442,9 +428,8 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter, ...@@ -442,9 +428,8 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter,
switch (counter->counter_dev->variant) { switch (counter->counter_dev->variant) {
case ni_gpct_variant_m_series: case ni_gpct_variant_m_series:
case ni_gpct_variant_660x: case ni_gpct_variant_660x:
if (read_register(counter, if (read_register(counter, NITIO_DMA_STATUS_REG(cidx)) &
NITIO_DMA_STATUS_REG Gi_DRQ_Error_Bit) {
(counter->counter_index)) & Gi_DRQ_Error_Bit) {
dev_notice(counter->counter_dev->dev->class_dev, dev_notice(counter->counter_dev->dev->class_dev,
"%s: Gi_DRQ_Error detected.\n", __func__); "%s: Gi_DRQ_Error detected.\n", __func__);
s->async->events |= COMEDI_CB_OVERFLOW; s->async->events |= COMEDI_CB_OVERFLOW;
......
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