Commit 553e3222 authored by Tero Kristo's avatar Tero Kristo Committed by Paul Walmsley

ARM: OMAP4: prm: fix interrupt register offsets

Previous code used wrong instance for the interrupt register access.
Use the right one which is OCP_SOCKET.
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Reviewed-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 387ca5bf
...@@ -146,8 +146,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs) ...@@ -146,8 +146,9 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16 irqst_offs)
u32 mask, st; u32 mask, st;
/* XXX read mask from RAM? */ /* XXX read mask from RAM? */
mask = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqen_offs); mask = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
st = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, irqst_offs); irqen_offs);
st = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, irqst_offs);
return mask & st; return mask & st;
} }
...@@ -179,7 +180,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events) ...@@ -179,7 +180,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
*/ */
void omap44xx_prm_ocp_barrier(void) void omap44xx_prm_ocp_barrier(void)
{ {
omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_REVISION_PRM_OFFSET); OMAP4_REVISION_PRM_OFFSET);
} }
...@@ -197,19 +198,19 @@ void omap44xx_prm_ocp_barrier(void) ...@@ -197,19 +198,19 @@ void omap44xx_prm_ocp_barrier(void)
void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
{ {
saved_mask[0] = saved_mask[0] =
omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQSTATUS_MPU_OFFSET); OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
saved_mask[1] = saved_mask[1] =
omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET);
omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_OFFSET); OMAP4_PRM_IRQENABLE_MPU_OFFSET);
omap4_prm_write_inst_reg(0, OMAP4430_PRM_DEVICE_INST, omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
/* OCP barrier */ /* OCP barrier */
omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_REVISION_PRM_OFFSET); OMAP4_REVISION_PRM_OFFSET);
} }
...@@ -225,9 +226,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) ...@@ -225,9 +226,9 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
*/ */
void omap44xx_prm_restore_irqen(u32 *saved_mask) void omap44xx_prm_restore_irqen(u32 *saved_mask)
{ {
omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_DEVICE_INST, omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_OFFSET); OMAP4_PRM_IRQENABLE_MPU_OFFSET);
omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_DEVICE_INST, omap4_prm_write_inst_reg(saved_mask[1], OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
} }
......
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