Commit 56f0df6b authored by Philippe Schenker's avatar Philippe Schenker Committed by Shawn Guo

ARM: dts: imx*(colibri|apalis): add missing recovery modes to i2c

This patch adds missing i2c recovery modes and corrects wrongly named
ones.
Signed-off-by: default avatarPhilippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 452831f3
...@@ -207,8 +207,11 @@ &hdmi { ...@@ -207,8 +207,11 @@ &hdmi {
/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
&i2c1 { &i2c1 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
pinctrl-1 = <&pinctrl_i2c1_gpio>;
scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled"; status = "disabled";
}; };
...@@ -218,8 +221,11 @@ &i2c1 { ...@@ -218,8 +221,11 @@ &i2c1 {
*/ */
&i2c2 { &i2c2 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>;
scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay"; status = "okay";
pmic: pfuze100@8 { pmic: pfuze100@8 {
...@@ -374,9 +380,9 @@ stmpe_adc { ...@@ -374,9 +380,9 @@ stmpe_adc {
*/ */
&i2c3 { &i2c3 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default", "recovery"; pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-1 = <&pinctrl_i2c3_recovery>; pinctrl-1 = <&pinctrl_i2c3_gpio>;
scl-gpios = <&gpio3 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio3 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled"; status = "disabled";
...@@ -661,6 +667,13 @@ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 ...@@ -661,6 +667,13 @@ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
>; >;
}; };
pinctrl_i2c1_gpio: i2c1gpiogrp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b8b1
MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp { pinctrl_i2c2: i2c2grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
...@@ -668,6 +681,13 @@ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ...@@ -668,6 +681,13 @@ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>; >;
}; };
pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp { pinctrl_i2c3: i2c3grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
...@@ -675,7 +695,7 @@ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 ...@@ -675,7 +695,7 @@ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>; >;
}; };
pinctrl_i2c3_recovery: i2c3recoverygrp { pinctrl_i2c3_gpio: i2c3gpiogrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1 MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1
MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1
......
...@@ -166,8 +166,11 @@ &hdmi { ...@@ -166,8 +166,11 @@ &hdmi {
*/ */
&i2c2 { &i2c2 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-0 = <&pinctrl_i2c2_gpio>;
scl-gpios = <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay"; status = "okay";
pmic: pfuze100@8 { pmic: pfuze100@8 {
...@@ -312,9 +315,9 @@ stmpe_adc { ...@@ -312,9 +315,9 @@ stmpe_adc {
*/ */
&i2c3 { &i2c3 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default", "recovery"; pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-1 = <&pinctrl_i2c3_recovery>; pinctrl-1 = <&pinctrl_i2c3_gpio>;
scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "disabled"; status = "disabled";
...@@ -512,6 +515,13 @@ MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 ...@@ -512,6 +515,13 @@ MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
>; >;
}; };
pinctrl_i2c2_gpio: i2c2grp {
fsl,pins = <
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1
MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp { pinctrl_i2c3: i2c3grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
...@@ -519,7 +529,7 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ...@@ -519,7 +529,7 @@ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>; >;
}; };
pinctrl_i2c3_recovery: i2c3recoverygrp { pinctrl_i2c3_gpio: i2c3gpiogrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
......
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