Commit 5748e1b3 authored by Christoph Hellwig's avatar Christoph Hellwig

MIPS: don't select DMA_MAYBE_COHERENT from DMA_PERDEV_COHERENT

While both option select a form of conditional dma coherence they don't
actually share any code in the implementation, so untangle them.
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Acked-by: default avatarPaul Burton <paul.burton@mips.com>
parent 684f7e91
...@@ -1111,7 +1111,7 @@ config DMA_MAYBE_COHERENT ...@@ -1111,7 +1111,7 @@ config DMA_MAYBE_COHERENT
config DMA_PERDEV_COHERENT config DMA_PERDEV_COHERENT
bool bool
select DMA_MAYBE_COHERENT select DMA_NONCOHERENT
config DMA_NONCOHERENT config DMA_NONCOHERENT
bool bool
......
...@@ -1067,7 +1067,7 @@ static int __init debugfs_mips(void) ...@@ -1067,7 +1067,7 @@ static int __init debugfs_mips(void)
arch_initcall(debugfs_mips); arch_initcall(debugfs_mips);
#endif #endif
#if defined(CONFIG_DMA_MAYBE_COHERENT) && !defined(CONFIG_DMA_PERDEV_COHERENT) #ifdef CONFIG_DMA_MAYBE_COHERENT
/* User defined DMA coherency from command line. */ /* User defined DMA coherency from command line. */
enum coherent_io_user_state coherentio = IO_COHERENCE_DEFAULT; enum coherent_io_user_state coherentio = IO_COHERENCE_DEFAULT;
EXPORT_SYMBOL_GPL(coherentio); EXPORT_SYMBOL_GPL(coherentio);
......
...@@ -1955,22 +1955,21 @@ void r4k_cache_init(void) ...@@ -1955,22 +1955,21 @@ void r4k_cache_init(void)
__flush_icache_user_range = r4k_flush_icache_user_range; __flush_icache_user_range = r4k_flush_icache_user_range;
__local_flush_icache_user_range = local_r4k_flush_icache_user_range; __local_flush_icache_user_range = local_r4k_flush_icache_user_range;
#if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_DMA_MAYBE_COHERENT) #ifdef CONFIG_DMA_NONCOHERENT
# if defined(CONFIG_DMA_PERDEV_COHERENT) #ifdef CONFIG_DMA_MAYBE_COHERENT
if (0) { if (coherentio == IO_COHERENCE_ENABLED ||
# else (coherentio == IO_COHERENCE_DEFAULT && hw_coherentio)) {
if ((coherentio == IO_COHERENCE_ENABLED) ||
((coherentio == IO_COHERENCE_DEFAULT) && hw_coherentio)) {
# endif
_dma_cache_wback_inv = (void *)cache_noop; _dma_cache_wback_inv = (void *)cache_noop;
_dma_cache_wback = (void *)cache_noop; _dma_cache_wback = (void *)cache_noop;
_dma_cache_inv = (void *)cache_noop; _dma_cache_inv = (void *)cache_noop;
} else { } else
#endif /* CONFIG_DMA_MAYBE_COHERENT */
{
_dma_cache_wback_inv = r4k_dma_cache_wback_inv; _dma_cache_wback_inv = r4k_dma_cache_wback_inv;
_dma_cache_wback = r4k_dma_cache_wback_inv; _dma_cache_wback = r4k_dma_cache_wback_inv;
_dma_cache_inv = r4k_dma_cache_inv; _dma_cache_inv = r4k_dma_cache_inv;
} }
#endif #endif /* CONFIG_DMA_NONCOHERENT */
build_clear_page(); build_clear_page();
build_copy_page(); build_copy_page();
......
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