Commit 5796d1c4 authored by Jeff Garzik's avatar Jeff Garzik

[libata] Address some checkpatch-spotted issues

Signed-off-by: default avatarJeff Garzik <jgarzik@redhat.com>
parent b447916e
...@@ -74,8 +74,7 @@ static int pcmcia_set_mode(struct ata_link *link, struct ata_device **r_failed_d ...@@ -74,8 +74,7 @@ static int pcmcia_set_mode(struct ata_link *link, struct ata_device **r_failed_d
return ata_do_set_mode(link, r_failed_dev); return ata_do_set_mode(link, r_failed_dev);
if (memcmp(master->id + ATA_ID_FW_REV, slave->id + ATA_ID_FW_REV, if (memcmp(master->id + ATA_ID_FW_REV, slave->id + ATA_ID_FW_REV,
ATA_ID_FW_REV_LEN + ATA_ID_PROD_LEN) == 0) ATA_ID_FW_REV_LEN + ATA_ID_PROD_LEN) == 0) {
{
/* Suspicious match, but could be two cards from /* Suspicious match, but could be two cards from
the same vendor - check serial */ the same vendor - check serial */
if (memcmp(master->id + ATA_ID_SERNO, slave->id + ATA_ID_SERNO, if (memcmp(master->id + ATA_ID_SERNO, slave->id + ATA_ID_SERNO,
...@@ -248,7 +247,8 @@ static int pcmcia_init_one(struct pcmcia_device *pdev) ...@@ -248,7 +247,8 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
goto next_entry; goto next_entry;
io_base = pdev->io.BasePort1; io_base = pdev->io.BasePort1;
ctl_base = pdev->io.BasePort1 + 0x0e; ctl_base = pdev->io.BasePort1 + 0x0e;
} else goto next_entry; } else
goto next_entry;
/* If we've got this far, we're done */ /* If we've got this far, we're done */
break; break;
} }
...@@ -285,8 +285,8 @@ static int pcmcia_init_one(struct pcmcia_device *pdev) ...@@ -285,8 +285,8 @@ static int pcmcia_init_one(struct pcmcia_device *pdev)
printk(KERN_WARNING DRV_NAME ": second channel not yet supported.\n"); printk(KERN_WARNING DRV_NAME ": second channel not yet supported.\n");
/* /*
* Having done the PCMCIA plumbing the ATA side is relatively * Having done the PCMCIA plumbing the ATA side is relatively
* sane. * sane.
*/ */
ret = -ENOMEM; ret = -ENOMEM;
host = ata_host_alloc(&pdev->dev, 1); host = ata_host_alloc(&pdev->dev, 1);
...@@ -363,7 +363,7 @@ static struct pcmcia_device_id pcmcia_devices[] = { ...@@ -363,7 +363,7 @@ static struct pcmcia_device_id pcmcia_devices[] = {
PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */ PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */
PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d), PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d),
PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */ PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */
PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */ PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */
PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001), PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001),
PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */ PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */
PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */ PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */
......
...@@ -47,10 +47,10 @@ ...@@ -47,10 +47,10 @@
#define DRV_VERSION "1.0" #define DRV_VERSION "1.0"
/* macro to calculate base address for ATA regs */ /* macro to calculate base address for ATA regs */
#define ADMA_ATA_REGS(base,port_no) ((base) + ((port_no) * 0x40)) #define ADMA_ATA_REGS(base, port_no) ((base) + ((port_no) * 0x40))
/* macro to calculate base address for ADMA regs */ /* macro to calculate base address for ADMA regs */
#define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20)) #define ADMA_REGS(base, port_no) ((base) + 0x80 + ((port_no) * 0x20))
/* macro to obtain addresses from ata_port */ /* macro to obtain addresses from ata_port */
#define ADMA_PORT_REGS(ap) \ #define ADMA_PORT_REGS(ap) \
...@@ -128,7 +128,7 @@ struct adma_port_priv { ...@@ -128,7 +128,7 @@ struct adma_port_priv {
adma_state_t state; adma_state_t state;
}; };
static int adma_ata_init_one (struct pci_dev *pdev, static int adma_ata_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent); const struct pci_device_id *ent);
static int adma_port_start(struct ata_port *ap); static int adma_port_start(struct ata_port *ap);
static void adma_host_stop(struct ata_host *host); static void adma_host_stop(struct ata_host *host);
...@@ -340,8 +340,8 @@ static int adma_fill_sg(struct ata_queued_cmd *qc) ...@@ -340,8 +340,8 @@ static int adma_fill_sg(struct ata_queued_cmd *qc)
buf[i++] = 0; /* pPKLW */ buf[i++] = 0; /* pPKLW */
buf[i++] = 0; /* reserved */ buf[i++] = 0; /* reserved */
*(__le32 *)(buf + i) *(__le32 *)(buf + i) =
= (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4); (pFLAGS & pEND) ? 0 : cpu_to_le32(pp->pkt_dma + i + 4);
i += 4; i += 4;
VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4, VPRINTK("PRD[%u] = (0x%lX, 0x%X)\n", i/4,
...@@ -617,7 +617,7 @@ static int adma_port_start(struct ata_port *ap) ...@@ -617,7 +617,7 @@ static int adma_port_start(struct ata_port *ap)
return -ENOMEM; return -ENOMEM;
/* paranoia? */ /* paranoia? */
if ((pp->pkt_dma & 7) != 0) { if ((pp->pkt_dma & 7) != 0) {
printk("bad alignment for pp->pkt_dma: %08x\n", printk(KERN_ERR "bad alignment for pp->pkt_dma: %08x\n",
(u32)pp->pkt_dma); (u32)pp->pkt_dma);
return -ENOMEM; return -ENOMEM;
} }
......
...@@ -143,7 +143,7 @@ static const int scr_map[] = { ...@@ -143,7 +143,7 @@ static const int scr_map[] = {
[SCR_CONTROL] = 2, [SCR_CONTROL] = 2,
}; };
static void __iomem * inic_port_base(struct ata_port *ap) static void __iomem *inic_port_base(struct ata_port *ap)
{ {
return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE; return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE;
} }
......
...@@ -1156,7 +1156,7 @@ static void mv_fill_sg(struct ata_queued_cmd *qc) ...@@ -1156,7 +1156,7 @@ static void mv_fill_sg(struct ata_queued_cmd *qc)
last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL); last_sg->flags_size |= cpu_to_le32(EPRD_FLAG_END_OF_TBL);
} }
static inline void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last) static void mv_crqb_pack_cmd(__le16 *cmdw, u8 data, u8 addr, unsigned last)
{ {
u16 tmp = data | (addr << CRQB_CMD_ADDR_SHIFT) | CRQB_CMD_CS | u16 tmp = data | (addr << CRQB_CMD_ADDR_SHIFT) | CRQB_CMD_CS |
(last ? CRQB_CMD_LAST : 0); (last ? CRQB_CMD_LAST : 0);
...@@ -2429,7 +2429,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) ...@@ -2429,7 +2429,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
struct mv_host_priv *hpriv = host->private_data; struct mv_host_priv *hpriv = host->private_data;
u32 hp_flags = hpriv->hp_flags; u32 hp_flags = hpriv->hp_flags;
switch(board_idx) { switch (board_idx) {
case chip_5080: case chip_5080:
hpriv->ops = &mv5xxx_ops; hpriv->ops = &mv5xxx_ops;
hp_flags |= MV_HP_GEN_I; hp_flags |= MV_HP_GEN_I;
...@@ -2510,7 +2510,8 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) ...@@ -2510,7 +2510,8 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
break; break;
default: default:
printk(KERN_ERR DRV_NAME ": BUG: invalid board index %u\n", board_idx); dev_printk(KERN_ERR, &pdev->dev,
"BUG: invalid board index %u\n", board_idx);
return 1; return 1;
} }
......
...@@ -291,7 +291,7 @@ struct nv_swncq_port_priv { ...@@ -291,7 +291,7 @@ struct nv_swncq_port_priv {
}; };
#define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & ( 1 << (19 + (12 * (PORT))))) #define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & (1 << (19 + (12 * (PORT)))))
static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
#ifdef CONFIG_PM #ifdef CONFIG_PM
...@@ -884,8 +884,9 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err) ...@@ -884,8 +884,9 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err)
/* Notifier bits set without a command may indicate the drive /* Notifier bits set without a command may indicate the drive
is misbehaving. Raise host state machine violation on this is misbehaving. Raise host state machine violation on this
condition. */ condition. */
ata_port_printk(ap, KERN_ERR, "notifier for tag %d with no command?\n", ata_port_printk(ap, KERN_ERR,
cpb_num); "notifier for tag %d with no cmd?\n",
cpb_num);
ehi->err_mask |= AC_ERR_HSM; ehi->err_mask |= AC_ERR_HSM;
ehi->action |= ATA_EH_SOFTRESET; ehi->action |= ATA_EH_SOFTRESET;
ata_port_freeze(ap); ata_port_freeze(ap);
...@@ -1021,8 +1022,8 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance) ...@@ -1021,8 +1022,8 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
while ((pos = ffs(check_commands)) && !error) { while ((pos = ffs(check_commands)) && !error) {
pos--; pos--;
error = nv_adma_check_cpb(ap, pos, error = nv_adma_check_cpb(ap, pos,
notifier_error & (1 << pos) ); notifier_error & (1 << pos));
check_commands &= ~(1 << pos ); check_commands &= ~(1 << pos);
} }
} }
} }
...@@ -1061,7 +1062,7 @@ static void nv_adma_freeze(struct ata_port *ap) ...@@ -1061,7 +1062,7 @@ static void nv_adma_freeze(struct ata_port *ap)
tmp = readw(mmio + NV_ADMA_CTL); tmp = readw(mmio + NV_ADMA_CTL);
writew(tmp & ~(NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN), writew(tmp & ~(NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN),
mmio + NV_ADMA_CTL); mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */ readw(mmio + NV_ADMA_CTL); /* flush posted write */
} }
static void nv_adma_thaw(struct ata_port *ap) static void nv_adma_thaw(struct ata_port *ap)
...@@ -1079,7 +1080,7 @@ static void nv_adma_thaw(struct ata_port *ap) ...@@ -1079,7 +1080,7 @@ static void nv_adma_thaw(struct ata_port *ap)
tmp = readw(mmio + NV_ADMA_CTL); tmp = readw(mmio + NV_ADMA_CTL);
writew(tmp | (NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN), writew(tmp | (NV_ADMA_CTL_AIEN | NV_ADMA_CTL_HOTPLUG_IEN),
mmio + NV_ADMA_CTL); mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */ readw(mmio + NV_ADMA_CTL); /* flush posted write */
} }
static void nv_adma_irq_clear(struct ata_port *ap) static void nv_adma_irq_clear(struct ata_port *ap)
...@@ -1165,7 +1166,7 @@ static int nv_adma_port_start(struct ata_port *ap) ...@@ -1165,7 +1166,7 @@ static int nv_adma_port_start(struct ata_port *ap)
pp->cpb_dma = mem_dma; pp->cpb_dma = mem_dma;
writel(mem_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); writel(mem_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW);
writel((mem_dma >> 16 ) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); writel((mem_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);
mem += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ; mem += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ;
mem_dma += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ; mem_dma += NV_ADMA_MAX_CPBS * NV_ADMA_CPB_SZ;
...@@ -1189,15 +1190,15 @@ static int nv_adma_port_start(struct ata_port *ap) ...@@ -1189,15 +1190,15 @@ static int nv_adma_port_start(struct ata_port *ap)
/* clear GO for register mode, enable interrupt */ /* clear GO for register mode, enable interrupt */
tmp = readw(mmio + NV_ADMA_CTL); tmp = readw(mmio + NV_ADMA_CTL);
writew( (tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN | writew((tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN |
NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL);
tmp = readw(mmio + NV_ADMA_CTL); tmp = readw(mmio + NV_ADMA_CTL);
writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */ readw(mmio + NV_ADMA_CTL); /* flush posted write */
udelay(1); udelay(1);
writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */ readw(mmio + NV_ADMA_CTL); /* flush posted write */
return 0; return 0;
} }
...@@ -1237,7 +1238,7 @@ static int nv_adma_port_resume(struct ata_port *ap) ...@@ -1237,7 +1238,7 @@ static int nv_adma_port_resume(struct ata_port *ap)
/* set CPB block location */ /* set CPB block location */
writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW); writel(pp->cpb_dma & 0xFFFFFFFF, mmio + NV_ADMA_CPB_BASE_LOW);
writel((pp->cpb_dma >> 16 ) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH); writel((pp->cpb_dma >> 16) >> 16, mmio + NV_ADMA_CPB_BASE_HIGH);
/* clear any outstanding interrupt conditions */ /* clear any outstanding interrupt conditions */
writew(0xffff, mmio + NV_ADMA_STAT); writew(0xffff, mmio + NV_ADMA_STAT);
...@@ -1250,15 +1251,15 @@ static int nv_adma_port_resume(struct ata_port *ap) ...@@ -1250,15 +1251,15 @@ static int nv_adma_port_resume(struct ata_port *ap)
/* clear GO for register mode, enable interrupt */ /* clear GO for register mode, enable interrupt */
tmp = readw(mmio + NV_ADMA_CTL); tmp = readw(mmio + NV_ADMA_CTL);
writew( (tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN | writew((tmp & ~NV_ADMA_CTL_GO) | NV_ADMA_CTL_AIEN |
NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL); NV_ADMA_CTL_HOTPLUG_IEN, mmio + NV_ADMA_CTL);
tmp = readw(mmio + NV_ADMA_CTL); tmp = readw(mmio + NV_ADMA_CTL);
writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); writew(tmp | NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */ readw(mmio + NV_ADMA_CTL); /* flush posted write */
udelay(1); udelay(1);
writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL); writew(tmp & ~NV_ADMA_CTL_CHANNEL_RESET, mmio + NV_ADMA_CTL);
readw(mmio + NV_ADMA_CTL ); /* flush posted write */ readw(mmio + NV_ADMA_CTL); /* flush posted write */
return 0; return 0;
} }
...@@ -1342,7 +1343,8 @@ static void nv_adma_fill_sg(struct ata_queued_cmd *qc, struct nv_adma_cpb *cpb) ...@@ -1342,7 +1343,8 @@ static void nv_adma_fill_sg(struct ata_queued_cmd *qc, struct nv_adma_cpb *cpb)
idx = 0; idx = 0;
ata_for_each_sg(sg, qc) { ata_for_each_sg(sg, qc) {
aprd = (idx < 5) ? &cpb->aprd[idx] : &pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (idx-5)]; aprd = (idx < 5) ? &cpb->aprd[idx] :
&pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (idx-5)];
nv_adma_fill_aprd(qc, sg, idx, aprd); nv_adma_fill_aprd(qc, sg, idx, aprd);
idx++; idx++;
} }
...@@ -1407,8 +1409,8 @@ static void nv_adma_qc_prep(struct ata_queued_cmd *qc) ...@@ -1407,8 +1409,8 @@ static void nv_adma_qc_prep(struct ata_queued_cmd *qc)
} else } else
memset(&cpb->aprd[0], 0, sizeof(struct nv_adma_prd) * 5); memset(&cpb->aprd[0], 0, sizeof(struct nv_adma_prd) * 5);
/* Be paranoid and don't let the device see NV_CPB_CTL_CPB_VALID until we are /* Be paranoid and don't let the device see NV_CPB_CTL_CPB_VALID
finished filling in all of the contents */ until we are finished filling in all of the contents */
wmb(); wmb();
cpb->ctl_flags = ctl_flags; cpb->ctl_flags = ctl_flags;
wmb(); wmb();
...@@ -1436,15 +1438,15 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc) ...@@ -1436,15 +1438,15 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc)
wmb(); wmb();
if (curr_ncq != pp->last_issue_ncq) { if (curr_ncq != pp->last_issue_ncq) {
/* Seems to need some delay before switching between NCQ and non-NCQ /* Seems to need some delay before switching between NCQ and
commands, else we get command timeouts and such. */ non-NCQ commands, else we get command timeouts and such. */
udelay(20); udelay(20);
pp->last_issue_ncq = curr_ncq; pp->last_issue_ncq = curr_ncq;
} }
writew(qc->tag, mmio + NV_ADMA_APPEND); writew(qc->tag, mmio + NV_ADMA_APPEND);
DPRINTK("Issued tag %u\n",qc->tag); DPRINTK("Issued tag %u\n", qc->tag);
return 0; return 0;
} }
...@@ -1654,7 +1656,8 @@ static void nv_adma_error_handler(struct ata_port *ap) ...@@ -1654,7 +1656,8 @@ static void nv_adma_error_handler(struct ata_port *ap)
u8 cpb_count = readb(mmio + NV_ADMA_CPB_COUNT); u8 cpb_count = readb(mmio + NV_ADMA_CPB_COUNT);
u8 next_cpb_idx = readb(mmio + NV_ADMA_NEXT_CPB_IDX); u8 next_cpb_idx = readb(mmio + NV_ADMA_NEXT_CPB_IDX);
ata_port_printk(ap, KERN_ERR, "EH in ADMA mode, notifier 0x%X " ata_port_printk(ap, KERN_ERR,
"EH in ADMA mode, notifier 0x%X "
"notifier_error 0x%X gen_ctl 0x%X status 0x%X " "notifier_error 0x%X gen_ctl 0x%X status 0x%X "
"next cpb count 0x%X next cpb idx 0x%x\n", "next cpb count 0x%X next cpb idx 0x%x\n",
notifier, notifier_error, gen_ctl, status, notifier, notifier_error, gen_ctl, status,
...@@ -1663,7 +1666,7 @@ static void nv_adma_error_handler(struct ata_port *ap) ...@@ -1663,7 +1666,7 @@ static void nv_adma_error_handler(struct ata_port *ap)
for (i = 0; i < NV_ADMA_MAX_CPBS; i++) { for (i = 0; i < NV_ADMA_MAX_CPBS; i++) {
struct nv_adma_cpb *cpb = &pp->cpb[i]; struct nv_adma_cpb *cpb = &pp->cpb[i];
if ((ata_tag_valid(ap->link.active_tag) && i == ap->link.active_tag) || if ((ata_tag_valid(ap->link.active_tag) && i == ap->link.active_tag) ||
ap->link.sactive & (1 << i) ) ap->link.sactive & (1 << i))
ata_port_printk(ap, KERN_ERR, ata_port_printk(ap, KERN_ERR,
"CPB %d: ctl_flags 0x%x, resp_flags 0x%x\n", "CPB %d: ctl_flags 0x%x, resp_flags 0x%x\n",
i, cpb->ctl_flags, cpb->resp_flags); i, cpb->ctl_flags, cpb->resp_flags);
...@@ -1673,7 +1676,8 @@ static void nv_adma_error_handler(struct ata_port *ap) ...@@ -1673,7 +1676,8 @@ static void nv_adma_error_handler(struct ata_port *ap)
/* Push us back into port register mode for error handling. */ /* Push us back into port register mode for error handling. */
nv_adma_register_mode(ap); nv_adma_register_mode(ap);
/* Mark all of the CPBs as invalid to prevent them from being executed */ /* Mark all of the CPBs as invalid to prevent them from
being executed */
for (i = 0; i < NV_ADMA_MAX_CPBS; i++) for (i = 0; i < NV_ADMA_MAX_CPBS; i++)
pp->cpb[i].ctl_flags &= ~NV_CPB_CTL_CPB_VALID; pp->cpb[i].ctl_flags &= ~NV_CPB_CTL_CPB_VALID;
...@@ -2350,9 +2354,9 @@ static irqreturn_t nv_swncq_interrupt(int irq, void *dev_instance) ...@@ -2350,9 +2354,9 @@ static irqreturn_t nv_swncq_interrupt(int irq, void *dev_instance)
return IRQ_RETVAL(handled); return IRQ_RETVAL(handled);
} }
static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
static int printed_version = 0; static int printed_version;
const struct ata_port_info *ppi[] = { NULL, NULL }; const struct ata_port_info *ppi[] = { NULL, NULL };
struct ata_host *host; struct ata_host *host;
struct nv_host_priv *hpriv; struct nv_host_priv *hpriv;
...@@ -2364,7 +2368,7 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -2364,7 +2368,7 @@ static int nv_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
// Make sure this is a SATA controller by counting the number of bars // Make sure this is a SATA controller by counting the number of bars
// (NVIDIA SATA controllers will always have six bars). Otherwise, // (NVIDIA SATA controllers will always have six bars). Otherwise,
// it's an IDE controller and we ignore it. // it's an IDE controller and we ignore it.
for (bar=0; bar<6; bar++) for (bar = 0; bar < 6; bar++)
if (pci_resource_start(pdev, bar) == 0) if (pci_resource_start(pdev, bar) == 0)
return -ENODEV; return -ENODEV;
...@@ -2460,17 +2464,17 @@ static int nv_pci_device_resume(struct pci_dev *pdev) ...@@ -2460,17 +2464,17 @@ static int nv_pci_device_resume(struct pci_dev *pdev)
pp = host->ports[0]->private_data; pp = host->ports[0]->private_data;
if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)
tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT0_EN | tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT0_EN |
NV_MCP_SATA_CFG_20_PORT0_PWB_EN); NV_MCP_SATA_CFG_20_PORT0_PWB_EN);
else else
tmp32 |= (NV_MCP_SATA_CFG_20_PORT0_EN | tmp32 |= (NV_MCP_SATA_CFG_20_PORT0_EN |
NV_MCP_SATA_CFG_20_PORT0_PWB_EN); NV_MCP_SATA_CFG_20_PORT0_PWB_EN);
pp = host->ports[1]->private_data; pp = host->ports[1]->private_data;
if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)
tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT1_EN | tmp32 &= ~(NV_MCP_SATA_CFG_20_PORT1_EN |
NV_MCP_SATA_CFG_20_PORT1_PWB_EN); NV_MCP_SATA_CFG_20_PORT1_PWB_EN);
else else
tmp32 |= (NV_MCP_SATA_CFG_20_PORT1_EN | tmp32 |= (NV_MCP_SATA_CFG_20_PORT1_EN |
NV_MCP_SATA_CFG_20_PORT1_PWB_EN); NV_MCP_SATA_CFG_20_PORT1_PWB_EN);
pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32); pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, tmp32);
} }
......
...@@ -83,10 +83,12 @@ enum { ...@@ -83,10 +83,12 @@ enum {
PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */ PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */
PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */ PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */
PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR, PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR,
PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR, PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR |
PDC_ERR_MASK = (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC_OVERRUN_ERR PDC2_ATA_DMA_CNT_ERR,
| PDC_UNDERRUN_ERR | PDC_DRIVE_ERR | PDC_PCI_SYS_ERR PDC_ERR_MASK = PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR |
| PDC1_ERR_MASK | PDC2_ERR_MASK), PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR |
PDC_DRIVE_ERR | PDC_PCI_SYS_ERR |
PDC1_ERR_MASK | PDC2_ERR_MASK,
board_2037x = 0, /* FastTrak S150 TX2plus */ board_2037x = 0, /* FastTrak S150 TX2plus */
board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */ board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */
...@@ -695,19 +697,20 @@ static void pdc_irq_clear(struct ata_port *ap) ...@@ -695,19 +697,20 @@ static void pdc_irq_clear(struct ata_port *ap)
readl(mmio + PDC_INT_SEQMASK); readl(mmio + PDC_INT_SEQMASK);
} }
static inline int pdc_is_sataii_tx4(unsigned long flags) static int pdc_is_sataii_tx4(unsigned long flags)
{ {
const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS; const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS;
return (flags & mask) == mask; return (flags & mask) == mask;
} }
static inline unsigned int pdc_port_no_to_ata_no(unsigned int port_no, int is_sataii_tx4) static unsigned int pdc_port_no_to_ata_no(unsigned int port_no,
int is_sataii_tx4)
{ {
static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2}; static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2};
return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no; return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no;
} }
static irqreturn_t pdc_interrupt (int irq, void *dev_instance) static irqreturn_t pdc_interrupt(int irq, void *dev_instance)
{ {
struct ata_host *host = dev_instance; struct ata_host *host = dev_instance;
struct ata_port *ap; struct ata_port *ap;
...@@ -839,15 +842,16 @@ static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc) ...@@ -839,15 +842,16 @@ static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc)
static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
{ {
WARN_ON (tf->protocol == ATA_PROT_DMA || WARN_ON(tf->protocol == ATA_PROT_DMA ||
tf->protocol == ATA_PROT_ATAPI_DMA); tf->protocol == ATA_PROT_ATAPI_DMA);
ata_tf_load(ap, tf); ata_tf_load(ap, tf);
} }
static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) static void pdc_exec_command_mmio(struct ata_port *ap,
const struct ata_taskfile *tf)
{ {
WARN_ON (tf->protocol == ATA_PROT_DMA || WARN_ON(tf->protocol == ATA_PROT_DMA ||
tf->protocol == ATA_PROT_ATAPI_DMA); tf->protocol == ATA_PROT_ATAPI_DMA);
ata_exec_command(ap, tf); ata_exec_command(ap, tf);
} }
...@@ -870,8 +874,11 @@ static int pdc_check_atapi_dma(struct ata_queued_cmd *qc) ...@@ -870,8 +874,11 @@ static int pdc_check_atapi_dma(struct ata_queued_cmd *qc)
} }
/* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */ /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */
if (scsicmd[0] == WRITE_10) { if (scsicmd[0] == WRITE_10) {
unsigned int lba; unsigned int lba =
lba = (scsicmd[2] << 24) | (scsicmd[3] << 16) | (scsicmd[4] << 8) | scsicmd[5]; (scsicmd[2] << 24) |
(scsicmd[3] << 16) |
(scsicmd[4] << 8) |
scsicmd[5];
if (lba >= 0xFFFF4FA2) if (lba >= 0xFFFF4FA2)
pio = 1; pio = 1;
} }
...@@ -956,7 +963,8 @@ static void pdc_host_init(struct ata_host *host) ...@@ -956,7 +963,8 @@ static void pdc_host_init(struct ata_host *host)
writel(tmp, mmio + PDC_SLEW_CTL); writel(tmp, mmio + PDC_SLEW_CTL);
} }
static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) static int pdc_ata_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
static int printed_version; static int printed_version;
const struct ata_port_info *pi = &pdc_port_info[ent->driver_data]; const struct ata_port_info *pi = &pdc_port_info[ent->driver_data];
......
...@@ -113,7 +113,7 @@ struct qs_port_priv { ...@@ -113,7 +113,7 @@ struct qs_port_priv {
static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); static int qs_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static int qs_port_start(struct ata_port *ap); static int qs_port_start(struct ata_port *ap);
static void qs_host_stop(struct ata_host *host); static void qs_host_stop(struct ata_host *host);
static void qs_phy_reset(struct ata_port *ap); static void qs_phy_reset(struct ata_port *ap);
...@@ -135,7 +135,6 @@ static struct scsi_host_template qs_ata_sht = { ...@@ -135,7 +135,6 @@ static struct scsi_host_template qs_ata_sht = {
.sg_tablesize = QS_MAX_PRD, .sg_tablesize = QS_MAX_PRD,
.cmd_per_lun = ATA_SHT_CMD_PER_LUN, .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
.emulated = ATA_SHT_EMULATED, .emulated = ATA_SHT_EMULATED,
//FIXME .use_clustering = ATA_SHT_USE_CLUSTERING,
.use_clustering = ENABLE_CLUSTERING, .use_clustering = ENABLE_CLUSTERING,
.proc_name = DRV_NAME, .proc_name = DRV_NAME,
.dma_boundary = QS_DMA_BOUNDARY, .dma_boundary = QS_DMA_BOUNDARY,
......
...@@ -111,7 +111,7 @@ enum { ...@@ -111,7 +111,7 @@ enum {
SIL_QUIRK_UDMA5MAX = (1 << 1), SIL_QUIRK_UDMA5MAX = (1 << 1),
}; };
static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
#ifdef CONFIG_PM #ifdef CONFIG_PM
static int sil_pci_device_resume(struct pci_dev *pdev); static int sil_pci_device_resume(struct pci_dev *pdev);
#endif #endif
...@@ -138,7 +138,7 @@ static const struct pci_device_id sil_pci_tbl[] = { ...@@ -138,7 +138,7 @@ static const struct pci_device_id sil_pci_tbl[] = {
/* TODO firmware versions should be added - eric */ /* TODO firmware versions should be added - eric */
static const struct sil_drivelist { static const struct sil_drivelist {
const char * product; const char *product;
unsigned int quirk; unsigned int quirk;
} sil_blacklist [] = { } sil_blacklist [] = {
{ "ST320012AS", SIL_QUIRK_MOD15WRITE }, { "ST320012AS", SIL_QUIRK_MOD15WRITE },
...@@ -279,7 +279,7 @@ MODULE_LICENSE("GPL"); ...@@ -279,7 +279,7 @@ MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, sil_pci_tbl); MODULE_DEVICE_TABLE(pci, sil_pci_tbl);
MODULE_VERSION(DRV_VERSION); MODULE_VERSION(DRV_VERSION);
static int slow_down = 0; static int slow_down;
module_param(slow_down, int, 0444); module_param(slow_down, int, 0444);
MODULE_PARM_DESC(slow_down, "Sledgehammer used to work around random problems, by limiting commands to 15 sectors (0=off, 1=on)"); MODULE_PARM_DESC(slow_down, "Sledgehammer used to work around random problems, by limiting commands to 15 sectors (0=off, 1=on)");
...@@ -332,7 +332,8 @@ static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed) ...@@ -332,7 +332,8 @@ static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed)
return 0; return 0;
} }
static inline void __iomem *sil_scr_addr(struct ata_port *ap, unsigned int sc_reg) static inline void __iomem *sil_scr_addr(struct ata_port *ap,
unsigned int sc_reg)
{ {
void __iomem *offset = ap->ioaddr.scr_addr; void __iomem *offset = ap->ioaddr.scr_addr;
...@@ -643,7 +644,7 @@ static void sil_init_controller(struct ata_host *host) ...@@ -643,7 +644,7 @@ static void sil_init_controller(struct ata_host *host)
} }
} }
static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
static int printed_version; static int printed_version;
int board_id = ent->driver_data; int board_id = ent->driver_data;
......
...@@ -674,7 +674,7 @@ static int sil24_do_softreset(struct ata_link *link, unsigned int *class, ...@@ -674,7 +674,7 @@ static int sil24_do_softreset(struct ata_link *link, unsigned int *class,
/* put the port into known state */ /* put the port into known state */
if (sil24_init_port(ap)) { if (sil24_init_port(ap)) {
reason ="port not ready"; reason = "port not ready";
goto err; goto err;
} }
...@@ -756,7 +756,8 @@ static int sil24_hardreset(struct ata_link *link, unsigned int *class, ...@@ -756,7 +756,8 @@ static int sil24_hardreset(struct ata_link *link, unsigned int *class,
writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT); writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT);
tmp = ata_wait_register(port + PORT_CTRL_STAT, tmp = ata_wait_register(port + PORT_CTRL_STAT,
PORT_CS_DEV_RST, PORT_CS_DEV_RST, 10, tout_msec); PORT_CS_DEV_RST, PORT_CS_DEV_RST, 10,
tout_msec);
/* SStatus oscillates between zero and valid status after /* SStatus oscillates between zero and valid status after
* DEV_RST, debounce it. * DEV_RST, debounce it.
...@@ -1270,7 +1271,7 @@ static void sil24_init_controller(struct ata_host *host) ...@@ -1270,7 +1271,7 @@ static void sil24_init_controller(struct ata_host *host)
PORT_CS_PORT_RST, 10, 100); PORT_CS_PORT_RST, 10, 100);
if (tmp & PORT_CS_PORT_RST) if (tmp & PORT_CS_PORT_RST)
dev_printk(KERN_ERR, host->dev, dev_printk(KERN_ERR, host->dev,
"failed to clear port RST\n"); "failed to clear port RST\n");
} }
/* configure port */ /* configure port */
...@@ -1283,7 +1284,7 @@ static void sil24_init_controller(struct ata_host *host) ...@@ -1283,7 +1284,7 @@ static void sil24_init_controller(struct ata_host *host)
static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
static int printed_version = 0; static int printed_version;
struct ata_port_info pi = sil24_port_info[ent->driver_data]; struct ata_port_info pi = sil24_port_info[ent->driver_data];
const struct ata_port_info *ppi[] = { &pi, NULL }; const struct ata_port_info *ppi[] = { &pi, NULL };
void __iomem * const *iomap; void __iomem * const *iomap;
......
...@@ -63,17 +63,17 @@ enum { ...@@ -63,17 +63,17 @@ enum {
GENCTL_IOMAPPED_SCR = (1 << 26), /* if set, SCRs are in IO space */ GENCTL_IOMAPPED_SCR = (1 << 26), /* if set, SCRs are in IO space */
}; };
static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static int sis_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val); static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
static int sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
static const struct pci_device_id sis_pci_tbl[] = { static const struct pci_device_id sis_pci_tbl[] = {
{ PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */
{ PCI_VDEVICE(SI, 0x0181), sis_180 }, /* SiS 964/180 */ { PCI_VDEVICE(SI, 0x0181), sis_180 }, /* SiS 964/180 */
{ PCI_VDEVICE(SI, 0x0182), sis_180 }, /* SiS 965/965L */ { PCI_VDEVICE(SI, 0x0182), sis_180 }, /* SiS 965/965L */
{ PCI_VDEVICE(SI, 0x0183), sis_180 }, /* SiS 965/965L */ { PCI_VDEVICE(SI, 0x0183), sis_180 }, /* SiS 965/965L */
{ PCI_VDEVICE(SI, 0x1182), sis_180 }, /* SiS 966/680 */ { PCI_VDEVICE(SI, 0x1182), sis_180 }, /* SiS 966/680 */
{ PCI_VDEVICE(SI, 0x1183), sis_180 }, /* SiS 966/966L/968/680 */ { PCI_VDEVICE(SI, 0x1183), sis_180 }, /* SiS 966/966L/968/680 */
{ } /* terminate list */ { } /* terminate list */
}; };
...@@ -149,24 +149,24 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) ...@@ -149,24 +149,24 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
if (ap->port_no) { if (ap->port_no) {
switch (pdev->device) { switch (pdev->device) {
case 0x0180: case 0x0180:
case 0x0181: case 0x0181:
pci_read_config_byte(pdev, SIS_PMR, &pmr); pci_read_config_byte(pdev, SIS_PMR, &pmr);
if ((pmr & SIS_PMR_COMBINED) == 0) if ((pmr & SIS_PMR_COMBINED) == 0)
addr += SIS180_SATA1_OFS; addr += SIS180_SATA1_OFS;
break; break;
case 0x0182: case 0x0182:
case 0x0183: case 0x0183:
case 0x1182: case 0x1182:
addr += SIS182_SATA1_OFS; addr += SIS182_SATA1_OFS;
break; break;
} }
} }
return addr; return addr;
} }
static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) static u32 sis_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
{ {
struct pci_dev *pdev = to_pci_dev(ap->host->dev); struct pci_dev *pdev = to_pci_dev(ap->host->dev);
unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
...@@ -190,7 +190,7 @@ static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) ...@@ -190,7 +190,7 @@ static u32 sis_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg, u32 *val)
return 0; return 0;
} }
static void sis_scr_cfg_write (struct ata_port *ap, unsigned int sc_reg, u32 val) static void sis_scr_cfg_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
{ {
struct pci_dev *pdev = to_pci_dev(ap->host->dev); struct pci_dev *pdev = to_pci_dev(ap->host->dev);
unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
...@@ -253,7 +253,7 @@ static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) ...@@ -253,7 +253,7 @@ static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
return 0; return 0;
} }
static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
static int printed_version; static int printed_version;
struct ata_port_info pi = sis_port_info; struct ata_port_info pi = sis_port_info;
...@@ -309,29 +309,33 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -309,29 +309,33 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
} else { } else {
dev_printk(KERN_INFO, &pdev->dev, dev_printk(KERN_INFO, &pdev->dev,
"Detected SiS 180/181 chipset in combined mode\n"); "Detected SiS 180/181 chipset in combined mode\n");
port2_start=0; port2_start = 0;
pi.flags |= ATA_FLAG_SLAVE_POSS; pi.flags |= ATA_FLAG_SLAVE_POSS;
} }
break; break;
case 0x0182: case 0x0182:
case 0x0183: case 0x0183:
pci_read_config_dword ( pdev, 0x6C, &val); pci_read_config_dword(pdev, 0x6C, &val);
if (val & (1L << 31)) { if (val & (1L << 31)) {
dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 182/965 chipset\n"); dev_printk(KERN_INFO, &pdev->dev,
"Detected SiS 182/965 chipset\n");
pi.flags |= ATA_FLAG_SLAVE_POSS; pi.flags |= ATA_FLAG_SLAVE_POSS;
} else { } else {
dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 182/965L chipset\n"); dev_printk(KERN_INFO, &pdev->dev,
"Detected SiS 182/965L chipset\n");
} }
break; break;
case 0x1182: case 0x1182:
dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 1182/966/680 SATA controller\n"); dev_printk(KERN_INFO, &pdev->dev,
"Detected SiS 1182/966/680 SATA controller\n");
pi.flags |= ATA_FLAG_SLAVE_POSS; pi.flags |= ATA_FLAG_SLAVE_POSS;
break; break;
case 0x1183: case 0x1183:
dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 1183/966/966L/968/680 controller in PATA mode\n"); dev_printk(KERN_INFO, &pdev->dev,
"Detected SiS 1183/966/966L/968/680 controller in PATA mode\n");
ppi[0] = &sis_info133_for_sata; ppi[0] = &sis_info133_for_sata;
ppi[1] = &sis_info133_for_sata; ppi[1] = &sis_info133_for_sata;
break; break;
......
...@@ -182,7 +182,7 @@ static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) ...@@ -182,7 +182,7 @@ static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
tf->hob_lbal = lbal >> 8; tf->hob_lbal = lbal >> 8;
tf->hob_lbam = lbam >> 8; tf->hob_lbam = lbam >> 8;
tf->hob_lbah = lbah >> 8; tf->hob_lbah = lbah >> 8;
} }
} }
/** /**
...@@ -193,7 +193,7 @@ static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) ...@@ -193,7 +193,7 @@ static void k2_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
* spin_lock_irqsave(host lock) * spin_lock_irqsave(host lock)
*/ */
static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc) static void k2_bmdma_setup_mmio(struct ata_queued_cmd *qc)
{ {
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
...@@ -224,7 +224,7 @@ static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc) ...@@ -224,7 +224,7 @@ static void k2_bmdma_setup_mmio (struct ata_queued_cmd *qc)
* spin_lock_irqsave(host lock) * spin_lock_irqsave(host lock)
*/ */
static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) static void k2_bmdma_start_mmio(struct ata_queued_cmd *qc)
{ {
struct ata_port *ap = qc->ap; struct ata_port *ap = qc->ap;
void __iomem *mmio = ap->ioaddr.bmdma_addr; void __iomem *mmio = ap->ioaddr.bmdma_addr;
...@@ -255,7 +255,7 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) ...@@ -255,7 +255,7 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc)
static u8 k2_stat_check_status(struct ata_port *ap) static u8 k2_stat_check_status(struct ata_port *ap)
{ {
return readl(ap->ioaddr.status_addr); return readl(ap->ioaddr.status_addr);
} }
#ifdef CONFIG_PPC_OF #ifdef CONFIG_PPC_OF
...@@ -395,7 +395,7 @@ static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base) ...@@ -395,7 +395,7 @@ static void k2_sata_setup_port(struct ata_ioports *port, void __iomem *base)
} }
static int k2_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
static int printed_version; static int printed_version;
const struct ata_port_info *ppi[] = const struct ata_port_info *ppi[] =
......
This diff is collapsed.
...@@ -56,9 +56,9 @@ struct uli_priv { ...@@ -56,9 +56,9 @@ struct uli_priv {
unsigned int scr_cfg_addr[uli_max_ports]; unsigned int scr_cfg_addr[uli_max_ports];
}; };
static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val); static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
static const struct pci_device_id uli_pci_tbl[] = { static const struct pci_device_id uli_pci_tbl[] = {
{ PCI_VDEVICE(AL, 0x5289), uli_5289 }, { PCI_VDEVICE(AL, 0x5289), uli_5289 },
...@@ -143,7 +143,7 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) ...@@ -143,7 +143,7 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
} }
static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) static u32 uli_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg)
{ {
struct pci_dev *pdev = to_pci_dev(ap->host->dev); struct pci_dev *pdev = to_pci_dev(ap->host->dev);
unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
...@@ -153,7 +153,7 @@ static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg) ...@@ -153,7 +153,7 @@ static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
return val; return val;
} }
static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val) static void uli_scr_cfg_write(struct ata_port *ap, unsigned int scr, u32 val)
{ {
struct pci_dev *pdev = to_pci_dev(ap->host->dev); struct pci_dev *pdev = to_pci_dev(ap->host->dev);
unsigned int cfg_addr = get_scr_cfg_addr(ap, scr); unsigned int cfg_addr = get_scr_cfg_addr(ap, scr);
...@@ -161,7 +161,7 @@ static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val) ...@@ -161,7 +161,7 @@ static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
pci_write_config_dword(pdev, cfg_addr, val); pci_write_config_dword(pdev, cfg_addr, val);
} }
static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
{ {
if (sc_reg > SCR_CONTROL) if (sc_reg > SCR_CONTROL)
return -EINVAL; return -EINVAL;
...@@ -170,16 +170,16 @@ static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val) ...@@ -170,16 +170,16 @@ static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val)
return 0; return 0;
} }
static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
{ {
if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
return -EINVAL; return -EINVAL;
uli_scr_cfg_write(ap, sc_reg, val); uli_scr_cfg_write(ap, sc_reg, val);
return 0; return 0;
} }
static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
static int printed_version; static int printed_version;
const struct ata_port_info *ppi[] = { &uli_port_info, NULL }; const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
......
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
* *
* Maintained by: Jeff Garzik <jgarzik@pobox.com> * Maintained by: Jeff Garzik <jgarzik@pobox.com>
* Please ALWAYS copy linux-ide@vger.kernel.org * Please ALWAYS copy linux-ide@vger.kernel.org
on emails. * on emails.
* *
* Copyright 2003-2004 Red Hat, Inc. All rights reserved. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
* Copyright 2003-2004 Jeff Garzik * Copyright 2003-2004 Jeff Garzik
...@@ -69,7 +69,7 @@ enum { ...@@ -69,7 +69,7 @@ enum {
SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */ SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */
}; };
static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
static void svia_noop_freeze(struct ata_port *ap); static void svia_noop_freeze(struct ata_port *ap);
...@@ -372,12 +372,12 @@ static const unsigned int vt6421_bar_sizes[] = { ...@@ -372,12 +372,12 @@ static const unsigned int vt6421_bar_sizes[] = {
16, 16, 16, 16, 32, 128 16, 16, 16, 16, 32, 128
}; };
static void __iomem * svia_scr_addr(void __iomem *addr, unsigned int port) static void __iomem *svia_scr_addr(void __iomem *addr, unsigned int port)
{ {
return addr + (port * 128); return addr + (port * 128);
} }
static void __iomem * vt6421_scr_addr(void __iomem *addr, unsigned int port) static void __iomem *vt6421_scr_addr(void __iomem *addr, unsigned int port)
{ {
return addr + (port * 64); return addr + (port * 64);
} }
...@@ -472,7 +472,7 @@ static void svia_configure(struct pci_dev *pdev) ...@@ -472,7 +472,7 @@ static void svia_configure(struct pci_dev *pdev)
if ((tmp8 & ALL_PORTS) != ALL_PORTS) { if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
dev_printk(KERN_DEBUG, &pdev->dev, dev_printk(KERN_DEBUG, &pdev->dev,
"enabling SATA channels (0x%x)\n", "enabling SATA channels (0x%x)\n",
(int) tmp8); (int) tmp8);
tmp8 |= ALL_PORTS; tmp8 |= ALL_PORTS;
pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8); pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8);
} }
...@@ -482,7 +482,7 @@ static void svia_configure(struct pci_dev *pdev) ...@@ -482,7 +482,7 @@ static void svia_configure(struct pci_dev *pdev)
if ((tmp8 & ALL_PORTS) != ALL_PORTS) { if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
dev_printk(KERN_DEBUG, &pdev->dev, dev_printk(KERN_DEBUG, &pdev->dev,
"enabling SATA channel interrupts (0x%x)\n", "enabling SATA channel interrupts (0x%x)\n",
(int) tmp8); (int) tmp8);
tmp8 |= ALL_PORTS; tmp8 |= ALL_PORTS;
pci_write_config_byte(pdev, SATA_INT_GATE, tmp8); pci_write_config_byte(pdev, SATA_INT_GATE, tmp8);
} }
...@@ -492,13 +492,13 @@ static void svia_configure(struct pci_dev *pdev) ...@@ -492,13 +492,13 @@ static void svia_configure(struct pci_dev *pdev)
if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) { if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) {
dev_printk(KERN_DEBUG, &pdev->dev, dev_printk(KERN_DEBUG, &pdev->dev,
"enabling SATA channel native mode (0x%x)\n", "enabling SATA channel native mode (0x%x)\n",
(int) tmp8); (int) tmp8);
tmp8 |= NATIVE_MODE_ALL; tmp8 |= NATIVE_MODE_ALL;
pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8); pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8);
} }
} }
static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{ {
static int printed_version; static int printed_version;
unsigned int i; unsigned int i;
...@@ -525,8 +525,8 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) ...@@ -525,8 +525,8 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
dev_printk(KERN_ERR, &pdev->dev, dev_printk(KERN_ERR, &pdev->dev,
"invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n", "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n",
i, i,
(unsigned long long)pci_resource_start(pdev, i), (unsigned long long)pci_resource_start(pdev, i),
(unsigned long long)pci_resource_len(pdev, i)); (unsigned long long)pci_resource_len(pdev, i));
return -ENODEV; return -ENODEV;
} }
......
...@@ -162,7 +162,8 @@ static void vsc_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) ...@@ -162,7 +162,8 @@ static void vsc_sata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
/* /*
* The only thing the ctl register is used for is SRST. * The only thing the ctl register is used for is SRST.
* That is not enabled or disabled via tf_load. * That is not enabled or disabled via tf_load.
* However, if ATA_NIEN is changed, then we need to change the interrupt register. * However, if ATA_NIEN is changed, then we need to change
* the interrupt register.
*/ */
if ((tf->ctl & ATA_NIEN) != (ap->last_ctl & ATA_NIEN)) { if ((tf->ctl & ATA_NIEN) != (ap->last_ctl & ATA_NIEN)) {
ap->last_ctl = tf->ctl; ap->last_ctl = tf->ctl;
...@@ -219,7 +220,7 @@ static void vsc_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) ...@@ -219,7 +220,7 @@ static void vsc_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
tf->hob_lbal = lbal >> 8; tf->hob_lbal = lbal >> 8;
tf->hob_lbam = lbam >> 8; tf->hob_lbam = lbam >> 8;
tf->hob_lbah = lbah >> 8; tf->hob_lbah = lbah >> 8;
} }
} }
static inline void vsc_error_intr(u8 port_status, struct ata_port *ap) static inline void vsc_error_intr(u8 port_status, struct ata_port *ap)
...@@ -256,9 +257,10 @@ static void vsc_port_intr(u8 port_status, struct ata_port *ap) ...@@ -256,9 +257,10 @@ static void vsc_port_intr(u8 port_status, struct ata_port *ap)
/* /*
* vsc_sata_interrupt * vsc_sata_interrupt
* *
* Read the interrupt register and process for the devices that have them pending. * Read the interrupt register and process for the devices that have
* them pending.
*/ */
static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance) static irqreturn_t vsc_sata_interrupt(int irq, void *dev_instance)
{ {
struct ata_host *host = dev_instance; struct ata_host *host = dev_instance;
unsigned int i; unsigned int i;
...@@ -287,7 +289,7 @@ static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance) ...@@ -287,7 +289,7 @@ static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance)
handled++; handled++;
} else } else
dev_printk(KERN_ERR, host->dev, dev_printk(KERN_ERR, host->dev,
": interrupt from disabled port %d\n", i); "interrupt from disabled port %d\n", i);
} }
} }
...@@ -363,7 +365,8 @@ static void __devinit vsc_sata_setup_port(struct ata_ioports *port, ...@@ -363,7 +365,8 @@ static void __devinit vsc_sata_setup_port(struct ata_ioports *port,
} }
static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) static int __devinit vsc_sata_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{ {
static const struct ata_port_info pi = { static const struct ata_port_info pi = {
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
......
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