Commit 57b78e41 authored by Justin Ernst's avatar Justin Ernst Committed by Greg Kroah-Hartman

EDAC: Raise the maximum number of memory controllers

[ Upstream commit 6b588594 ]

We observe an oops in the skx_edac module during boot:

  EDAC MC0: Giving out device to module skx_edac controller Skylake Socket#0 IMC#0
  EDAC MC1: Giving out device to module skx_edac controller Skylake Socket#0 IMC#1
  EDAC MC2: Giving out device to module skx_edac controller Skylake Socket#1 IMC#0
  ...
  EDAC MC13: Giving out device to module skx_edac controller Skylake Socket#0 IMC#1
  EDAC MC14: Giving out device to module skx_edac controller Skylake Socket#1 IMC#0
  EDAC MC15: Giving out device to module skx_edac controller Skylake Socket#1 IMC#1
  Too many memory controllers: 16
  EDAC MC: Removed device 0 for skx_edac Skylake Socket#0 IMC#0

We observe there are two memory controllers per socket, with a limit
of 16. Raise the maximum number of memory controllers from 16 to 2 *
MAX_NUMNODES (1024).

[ bp: This is just a band-aid fix until we've sorted out the whole issue
  with the bus_type association and handling in EDAC and can get rid of
  this arbitrary limit. ]
Signed-off-by: default avatarJustin Ernst <justin.ernst@hpe.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Acked-by: default avatarRuss Anderson <russ.anderson@hpe.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/20180925143449.284634-1-justin.ernst@hpe.comSigned-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 352668d3
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#include <linux/completion.h> #include <linux/completion.h>
#include <linux/workqueue.h> #include <linux/workqueue.h>
#include <linux/debugfs.h> #include <linux/debugfs.h>
#include <linux/numa.h>
#define EDAC_DEVICE_NAME_LEN 31 #define EDAC_DEVICE_NAME_LEN 31
...@@ -670,6 +671,6 @@ struct mem_ctl_info { ...@@ -670,6 +671,6 @@ struct mem_ctl_info {
/* /*
* Maximum number of memory controllers in the coherent fabric. * Maximum number of memory controllers in the coherent fabric.
*/ */
#define EDAC_MAX_MCS 16 #define EDAC_MAX_MCS 2 * MAX_NUMNODES
#endif #endif
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