Commit 57ca5151 authored by Kukjin Kim's avatar Kukjin Kim

Merge branch 'next-samsung' into for-next-new

parents e641d158 d930596a
......@@ -30,41 +30,41 @@
#include <plat/pm.h>
#define eint_offset(irq) ((irq) - IRQ_EINT(0))
#define eint_irq_to_bit(irq) (1 << eint_offset(irq))
#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq)))
static inline void s3c_irq_eint_mask(unsigned int irq)
static inline void s3c_irq_eint_mask(struct irq_data *data)
{
u32 mask;
mask = __raw_readl(S3C64XX_EINT0MASK);
mask |= eint_irq_to_bit(irq);
mask |= (u32)data->chip_data;
__raw_writel(mask, S3C64XX_EINT0MASK);
}
static void s3c_irq_eint_unmask(unsigned int irq)
static void s3c_irq_eint_unmask(struct irq_data *data)
{
u32 mask;
mask = __raw_readl(S3C64XX_EINT0MASK);
mask &= ~eint_irq_to_bit(irq);
mask &= ~((u32)data->chip_data);
__raw_writel(mask, S3C64XX_EINT0MASK);
}
static inline void s3c_irq_eint_ack(unsigned int irq)
static inline void s3c_irq_eint_ack(struct irq_data *data)
{
__raw_writel(eint_irq_to_bit(irq), S3C64XX_EINT0PEND);
__raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND);
}
static void s3c_irq_eint_maskack(unsigned int irq)
static void s3c_irq_eint_maskack(struct irq_data *data)
{
/* compiler should in-line these */
s3c_irq_eint_mask(irq);
s3c_irq_eint_ack(irq);
s3c_irq_eint_mask(data);
s3c_irq_eint_ack(data);
}
static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
static int s3c_irq_eint_set_type(struct irq_data *data, unsigned int type)
{
int offs = eint_offset(irq);
int offs = eint_offset(data->irq);
int pin, pin_val;
int shift;
u32 ctrl, mask;
......@@ -140,12 +140,12 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
static struct irq_chip s3c_irq_eint = {
.name = "s3c-eint",
.mask = s3c_irq_eint_mask,
.unmask = s3c_irq_eint_unmask,
.mask_ack = s3c_irq_eint_maskack,
.ack = s3c_irq_eint_ack,
.set_type = s3c_irq_eint_set_type,
.set_wake = s3c_irqext_wake,
.irq_mask = s3c_irq_eint_mask,
.irq_unmask = s3c_irq_eint_unmask,
.irq_mask_ack = s3c_irq_eint_maskack,
.irq_ack = s3c_irq_eint_ack,
.irq_set_type = s3c_irq_eint_set_type,
.irq_set_wake = s3c_irqext_wake,
};
/* s3c_irq_demux_eint
......@@ -198,6 +198,7 @@ static int __init s3c64xx_init_irq_eint(void)
for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) {
set_irq_chip(irq, &s3c_irq_eint);
set_irq_chip_data(irq, (void *)eint_irq_to_bit(irq));
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
......
......@@ -152,7 +152,7 @@ static struct irq_chip s5pv310_irq_eint = {
.ack = s5pv310_irq_eint_ack,
.set_type = s5pv310_irq_eint_set_type,
#ifdef CONFIG_PM
.set_wake = s3c_irqext_wake,
.irq_set_wake = s3c_irqext_wake,
#endif
};
......
......@@ -238,7 +238,7 @@ static struct irq_chip s3c_irqext_chip = {
.unmask = s3c_irqext_unmask,
.ack = s3c_irqext_ack,
.set_type = s3c_irqext_type,
.set_wake = s3c_irqext_wake
.irq_set_wake = s3c_irqext_wake
};
static struct irq_chip s3c_irq_eint0t4 = {
......
......@@ -125,7 +125,7 @@ static struct irq_chip s5p_irq_eint = {
.ack = s5p_irq_eint_ack,
.set_type = s5p_irq_eint_set_type,
#ifdef CONFIG_PM
.set_wake = s3c_irqext_wake,
.irq_set_wake = s3c_irqext_wake,
#endif
};
......@@ -194,7 +194,7 @@ static struct irq_chip s5p_irq_vic_eint = {
.ack = s5p_irq_vic_eint_ack,
.set_type = s5p_irq_eint_set_type,
#ifdef CONFIG_PM
.set_wake = s3c_irqext_wake,
.irq_set_wake = s3c_irqext_wake,
#endif
};
......
......@@ -333,4 +333,12 @@ config SAMSUNG_WAKEMASK
and above. This code allows a set of interrupt to wakeup-mask
mappings. See <plat/wakeup-mask.h>
comment "Power Domain"
config SAMSUNG_PD
bool "Samsung Power Domain"
depends on PM_RUNTIME
help
Say Y here if you want to control Power Domain by Runtime PM.
endif
......@@ -73,6 +73,10 @@ obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o
# PD support
obj-$(CONFIG_SAMSUNG_PD) += pd.o
# PWM support
obj-$(CONFIG_HAVE_PWM) += pwm.o
/* linux/arch/arm/plat-samsung/include/plat/pd.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_PLAT_SAMSUNG_PD_H
#define __ASM_PLAT_SAMSUNG_PD_H __FILE__
struct samsung_pd_info {
int (*enable)(struct device *dev);
int (*disable)(struct device *dev);
void __iomem *base;
};
enum s5pv310_pd_block {
PD_MFC,
PD_G3D,
PD_LCD0,
PD_LCD1,
PD_TV,
PD_CAM,
PD_GPS
};
#endif /* __ASM_PLAT_SAMSUNG_PD_H */
......@@ -15,6 +15,8 @@
* management
*/
#include <linux/irq.h>
#ifdef CONFIG_PM
extern __init int s3c_pm_init(void);
......@@ -100,7 +102,7 @@ extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
#ifdef CONFIG_PM
extern int s3c_irqext_wake(unsigned int irqno, unsigned int state);
extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state);
extern int s3c24xx_irq_resume(struct sys_device *dev);
#else
......
......@@ -28,9 +28,9 @@
* are consecutive when looking up the interrupt in the demux routines.
*/
static inline void __iomem *s3c_irq_uart_base(unsigned int irq)
static inline void __iomem *s3c_irq_uart_base(struct irq_data *data)
{
struct s3c_uart_irq *uirq = get_irq_chip_data(irq);
struct s3c_uart_irq *uirq = data->chip_data;
return uirq->regs;
}
......@@ -39,10 +39,10 @@ static inline unsigned int s3c_irq_uart_bit(unsigned int irq)
return irq & 3;
}
static void s3c_irq_uart_mask(unsigned int irq)
static void s3c_irq_uart_mask(struct irq_data *data)
{
void __iomem *regs = s3c_irq_uart_base(irq);
unsigned int bit = s3c_irq_uart_bit(irq);
void __iomem *regs = s3c_irq_uart_base(data);
unsigned int bit = s3c_irq_uart_bit(data->irq);
u32 reg;
reg = __raw_readl(regs + S3C64XX_UINTM);
......@@ -50,10 +50,10 @@ static void s3c_irq_uart_mask(unsigned int irq)
__raw_writel(reg, regs + S3C64XX_UINTM);
}
static void s3c_irq_uart_maskack(unsigned int irq)
static void s3c_irq_uart_maskack(struct irq_data *data)
{
void __iomem *regs = s3c_irq_uart_base(irq);
unsigned int bit = s3c_irq_uart_bit(irq);
void __iomem *regs = s3c_irq_uart_base(data);
unsigned int bit = s3c_irq_uart_bit(data->irq);
u32 reg;
reg = __raw_readl(regs + S3C64XX_UINTM);
......@@ -62,10 +62,10 @@ static void s3c_irq_uart_maskack(unsigned int irq)
__raw_writel(1 << bit, regs + S3C64XX_UINTP);
}
static void s3c_irq_uart_unmask(unsigned int irq)
static void s3c_irq_uart_unmask(struct irq_data *data)
{
void __iomem *regs = s3c_irq_uart_base(irq);
unsigned int bit = s3c_irq_uart_bit(irq);
void __iomem *regs = s3c_irq_uart_base(data);
unsigned int bit = s3c_irq_uart_bit(data->irq);
u32 reg;
reg = __raw_readl(regs + S3C64XX_UINTM);
......@@ -73,10 +73,10 @@ static void s3c_irq_uart_unmask(unsigned int irq)
__raw_writel(reg, regs + S3C64XX_UINTM);
}
static void s3c_irq_uart_ack(unsigned int irq)
static void s3c_irq_uart_ack(struct irq_data *data)
{
void __iomem *regs = s3c_irq_uart_base(irq);
unsigned int bit = s3c_irq_uart_bit(irq);
void __iomem *regs = s3c_irq_uart_base(data);
unsigned int bit = s3c_irq_uart_bit(data->irq);
__raw_writel(1 << bit, regs + S3C64XX_UINTP);
}
......@@ -99,10 +99,10 @@ static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
static struct irq_chip s3c_irq_uart = {
.name = "s3c-uart",
.mask = s3c_irq_uart_mask,
.unmask = s3c_irq_uart_unmask,
.mask_ack = s3c_irq_uart_maskack,
.ack = s3c_irq_uart_ack,
.irq_mask = s3c_irq_uart_mask,
.irq_unmask = s3c_irq_uart_unmask,
.irq_mask_ack = s3c_irq_uart_maskack,
.irq_ack = s3c_irq_uart_ack,
};
static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
......
......@@ -29,38 +29,41 @@ static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
static void s3c_irq_timer_mask(unsigned int irq)
static void s3c_irq_timer_mask(struct irq_data *data)
{
u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
u32 mask = (u32)data->chip_data;
reg &= 0x1f; /* mask out pending interrupts */
reg &= ~(1 << (irq - IRQ_TIMER0));
reg &= ~mask;
__raw_writel(reg, S3C64XX_TINT_CSTAT);
}
static void s3c_irq_timer_unmask(unsigned int irq)
static void s3c_irq_timer_unmask(struct irq_data *data)
{
u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
u32 mask = (u32)data->chip_data;
reg &= 0x1f; /* mask out pending interrupts */
reg |= 1 << (irq - IRQ_TIMER0);
reg |= mask;
__raw_writel(reg, S3C64XX_TINT_CSTAT);
}
static void s3c_irq_timer_ack(unsigned int irq)
static void s3c_irq_timer_ack(struct irq_data *data)
{
u32 reg = __raw_readl(S3C64XX_TINT_CSTAT);
u32 mask = (u32)data->chip_data;
reg &= 0x1f;
reg |= (1 << 5) << (irq - IRQ_TIMER0);
reg |= mask << 5;
__raw_writel(reg, S3C64XX_TINT_CSTAT);
}
static struct irq_chip s3c_irq_timer = {
.name = "s3c-timer",
.mask = s3c_irq_timer_mask,
.unmask = s3c_irq_timer_unmask,
.ack = s3c_irq_timer_ack,
.irq_mask = s3c_irq_timer_mask,
.irq_unmask = s3c_irq_timer_unmask,
.irq_ack = s3c_irq_timer_ack,
};
/**
......@@ -79,6 +82,7 @@ void __init s3c_init_vic_timer_irq(unsigned int parent_irq,
set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer);
set_irq_chip(timer_irq, &s3c_irq_timer);
set_irq_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0)));
set_irq_handler(timer_irq, handle_level_irq);
set_irq_flags(timer_irq, IRQF_VALID);
......
/* linux/arch/arm/plat-samsung/pd.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Samsung Power domain support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/pm_runtime.h>
#include <plat/pd.h>
static int samsung_pd_probe(struct platform_device *pdev)
{
struct samsung_pd_info *pdata = pdev->dev.platform_data;
struct device *dev = &pdev->dev;
if (!pdata) {
dev_err(dev, "no device data specified\n");
return -ENOENT;
}
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
dev_info(dev, "power domain registered\n");
return 0;
}
static int __devexit samsung_pd_remove(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
pm_runtime_disable(dev);
return 0;
}
static int samsung_pd_runtime_suspend(struct device *dev)
{
struct samsung_pd_info *pdata = dev->platform_data;
int ret = 0;
if (pdata->disable)
ret = pdata->disable(dev);
dev_dbg(dev, "suspended\n");
return ret;
}
static int samsung_pd_runtime_resume(struct device *dev)
{
struct samsung_pd_info *pdata = dev->platform_data;
int ret = 0;
if (pdata->enable)
ret = pdata->enable(dev);
dev_dbg(dev, "resumed\n");
return ret;
}
static const struct dev_pm_ops samsung_pd_pm_ops = {
.runtime_suspend = samsung_pd_runtime_suspend,
.runtime_resume = samsung_pd_runtime_resume,
};
static struct platform_driver samsung_pd_driver = {
.driver = {
.name = "samsung-pd",
.owner = THIS_MODULE,
.pm = &samsung_pd_pm_ops,
},
.probe = samsung_pd_probe,
.remove = __devexit_p(samsung_pd_remove),
};
static int __init samsung_pd_init(void)
{
int ret;
ret = platform_driver_register(&samsung_pd_driver);
if (ret)
printk(KERN_ERR "%s: failed to add PD driver\n", __func__);
return ret;
}
arch_initcall(samsung_pd_init);
......@@ -136,15 +136,15 @@ static void s3c_pm_restore_uarts(void) { }
unsigned long s3c_irqwake_intmask = 0xffffffffL;
unsigned long s3c_irqwake_eintmask = 0xffffffffL;
int s3c_irqext_wake(unsigned int irqno, unsigned int state)
int s3c_irqext_wake(struct irq_data *data, unsigned int state)
{
unsigned long bit = 1L << IRQ_EINT_BIT(irqno);
unsigned long bit = 1L << IRQ_EINT_BIT(data->irq);
if (!(s3c_irqwake_eintallow & bit))
return -ENOENT;
printk(KERN_INFO "wake %s for irq %d\n",
state ? "enabled" : "disabled", irqno);
state ? "enabled" : "disabled", data->irq);
if (!state)
s3c_irqwake_eintmask |= bit;
......
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