Commit 58c37689 authored by Purna Chandra Mandal's avatar Purna Chandra Mandal Committed by Ralf Baechle

dt/bindings: Correct clk binding example for PIC32 DMT.

Update binding example based on new clock binding scheme.
[1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
Signed-off-by: default avatarPurna Chandra Mandal <purna.mandal@microchip.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Joshua Henderson <digitalpeer@digitalpeer.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13268/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 9c719d87
...@@ -8,12 +8,12 @@ Required properties: ...@@ -8,12 +8,12 @@ Required properties:
- compatible: must be "microchip,pic32mzda-dmt". - compatible: must be "microchip,pic32mzda-dmt".
- reg: physical base address of the controller and length of memory mapped - reg: physical base address of the controller and length of memory mapped
region. region.
- clocks: phandle of parent clock (should be &PBCLK7). - clocks: phandle of source clk. Should be <&rootclk PB7CLK>.
Example: Example:
watchdog@1f800a00 { watchdog@1f800a00 {
compatible = "microchip,pic32mzda-dmt"; compatible = "microchip,pic32mzda-dmt";
reg = <0x1f800a00 0x80>; reg = <0x1f800a00 0x80>;
clocks = <&PBCLK7>; clocks = <&rootclk PB7CLK>;
}; };
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