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Commit 58ee0d3b authored by Mike Frysinger's avatar Mike Frysinger
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Blackfin: punt unused HDMA masks 

No code uses these, and the short define names are polluting the global
namespace where they collide with things like common irq files.  So just
punt the damned things.  If in the future we need HDMA support, we can
make a standalone header for these things.
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent a8d0142f
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arch/blackfin/mach-bf518/include/mach/defBF512.h
View file @ 58ee0d3b
......@@ -1201,25 +1201,6 @@
#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */
#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */
/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/
/* HDMAx_CTL Masks */
#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */
#define REP 0x0002 /* HDMA Request Polarity */
#define UTE 0x0004 /* Urgency Threshold Enable */
#define OIE 0x0010 /* Overflow Interrupt Enable */
#define BDIE 0x0020 /* Block Done Interrupt Enable */
#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */
#define DRQ 0x0300 /* HDMA Request Type */
#define DRQ_NONE 0x0000 /* No Request */
#define DRQ_SINGLE 0x0100 /* Channels Request Single */
#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */
#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */
#define RBC 0x1000 /* Reload BCNT With IBCNT */
#define PS 0x2000 /* HDMA Pin Status */
#define OI 0x4000 /* Overflow Interrupt Generated */
#define BDI 0x8000 /* Block Done Interrupt Generated */
/* entry addresses of the user-callable Boot ROM functions */
#define _BOOTROM_RESET 0xEF000000
......
arch/blackfin/mach-bf527/include/mach/defBF522.h
View file @ 58ee0d3b
......@@ -1204,25 +1204,6 @@
#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */
#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */
/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/
/* HDMAx_CTL Masks */
#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */
#define REP 0x0002 /* HDMA Request Polarity */
#define UTE 0x0004 /* Urgency Threshold Enable */
#define OIE 0x0010 /* Overflow Interrupt Enable */
#define BDIE 0x0020 /* Block Done Interrupt Enable */
#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */
#define DRQ 0x0300 /* HDMA Request Type */
#define DRQ_NONE 0x0000 /* No Request */
#define DRQ_SINGLE 0x0100 /* Channels Request Single */
#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */
#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */
#define RBC 0x1000 /* Reload BCNT With IBCNT */
#define PS 0x2000 /* HDMA Pin Status */
#define OI 0x4000 /* Overflow Interrupt Generated */
#define BDI 0x8000 /* Block Done Interrupt Generated */
/* entry addresses of the user-callable Boot ROM functions */
#define _BOOTROM_RESET 0xEF000000
......
arch/blackfin/mach-bf537/include/mach/defBF534.h
View file @ 58ee0d3b
......@@ -1520,24 +1520,6 @@
#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */
#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */
/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/
/* HDMAx_CTL Masks */
#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */
#define REP 0x0002 /* HDMA Request Polarity */
#define UTE 0x0004 /* Urgency Threshold Enable */
#define OIE 0x0010 /* Overflow Interrupt Enable */
#define BDIE 0x0020 /* Block Done Interrupt Enable */
#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */
#define DRQ 0x0300 /* HDMA Request Type */
#define DRQ_NONE 0x0000 /* No Request */
#define DRQ_SINGLE 0x0100 /* Channels Request Single */
#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */
#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */
#define RBC 0x1000 /* Reload BCNT With IBCNT */
#define PS 0x2000 /* HDMA Pin Status */
#define OI 0x4000 /* Overflow Interrupt Generated */
#define BDI 0x8000 /* Block Done Interrupt Generated */
/* entry addresses of the user-callable Boot ROM functions */
#define _BOOTROM_RESET 0xEF000000
......
arch/blackfin/mach-bf548/include/mach/defBF544.h
View file @ 58ee0d3b
......@@ -657,22 +657,4 @@
/* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */
/* Bit masks for HMDMAx_CONTROL */
#define HMDMAEN 0x1 /* Handshake MDMA Enable */
#define REP 0x2 /* Handshake MDMA Request Polarity */
#define UTE 0x8 /* Urgency Threshold Enable */
#define OIE 0x10 /* Overflow Interrupt Enable */
#define BDIE 0x20 /* Block Done Interrupt Enable */
#define MBDI 0x40 /* Mask Block Done Interrupt */
#define DRQ 0x300 /* Handshake MDMA Request Type */
#define RBC 0x1000 /* Force Reload of BCOUNT */
#define PS 0x2000 /* Pin Status */
#define OI 0x4000 /* Overflow Interrupt Generated */
#define BDI 0x8000 /* Block Done Interrupt Generated */
/* ******************************************* */
/* MULTI BIT MACRO ENUMERATIONS */
/* ******************************************* */
#endif /* _DEF_BF544_H */
arch/blackfin/mach-bf548/include/mach/defBF547.h
View file @ 58ee0d3b
......@@ -1063,23 +1063,4 @@
#define DMA_COUNT_LOW 0xffff /* Lower 16-bits of byte count of DMA transfer for DMA master channel */
/* Bit masks for HMDMAx_CONTROL */
#define HMDMAEN 0x1 /* Handshake MDMA Enable */
#define REP 0x2 /* Handshake MDMA Request Polarity */
#define UTE 0x8 /* Urgency Threshold Enable */
#define OIE 0x10 /* Overflow Interrupt Enable */
#define BDIE 0x20 /* Block Done Interrupt Enable */
#define MBDI 0x40 /* Mask Block Done Interrupt */
#define DRQ 0x300 /* Handshake MDMA Request Type */
#define RBC 0x1000 /* Force Reload of BCOUNT */
#define PS 0x2000 /* Pin Status */
#define OI 0x4000 /* Overflow Interrupt Generated */
#define BDI 0x8000 /* Block Done Interrupt Generated */
/* ******************************************* */
/* MULTI BIT MACRO ENUMERATIONS */
/* ******************************************* */
#endif /* _DEF_BF547_H */
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