Commit 594034b7 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Felix Fietkau

mt76: mt7615: make scs configurable per phy

Make scs configurable per phy since most of the chipsets do not
support dbdc
Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent b61e45eb
......@@ -20,11 +20,15 @@ static int
mt7615_scs_set(void *data, u64 val)
{
struct mt7615_dev *dev = data;
struct mt7615_phy *ext_phy;
if (!mt7615_wait_for_mcu_init(dev))
return 0;
mt7615_mac_set_scs(dev, val);
mt7615_mac_set_scs(&dev->phy, val);
ext_phy = mt7615_ext_phy(dev);
if (ext_phy)
mt7615_mac_set_scs(ext_phy, val);
return 0;
}
......@@ -34,7 +38,7 @@ mt7615_scs_get(void *data, u64 *val)
{
struct mt7615_dev *dev = data;
*val = dev->scs_en;
*val = dev->phy.scs_en;
return 0;
}
......
......@@ -90,7 +90,7 @@ static void mt7615_mac_init(struct mt7615_dev *dev)
MT_TMAC_CTCR0_INS_DDLMT_EN);
mt7615_mcu_set_rts_thresh(&dev->phy, 0x92b);
mt7615_mac_set_scs(dev, true);
mt7615_mac_set_scs(&dev->phy, true);
mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
......@@ -411,6 +411,8 @@ int mt7615_register_ext_phy(struct mt7615_dev *dev)
mphy->antenna_mask = BIT(hweight8(phy->chainmask)) - 1;
mt7615_init_wiphy(mphy->hw);
mt7615_mac_set_scs(phy, true);
/*
* Make the secondary PHY MAC address local without overlapping with
* the usual MAC address allocation scheme on multiple virtual interfaces
......
......@@ -1517,40 +1517,33 @@ mt7615_mac_set_default_sensitivity(struct mt7615_phy *phy)
phy->last_cca_adj = jiffies;
}
void mt7615_mac_set_scs(struct mt7615_dev *dev, bool enable)
void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable)
{
struct mt7615_phy *ext_phy;
struct mt7615_dev *dev = phy->dev;
bool ext_phy = phy != &dev->phy;
mutex_lock(&dev->mt76.mutex);
if (dev->scs_en == enable)
if (phy->scs_en == enable)
goto out;
if (is_mt7663(&dev->mt76))
goto out;
if (enable) {
mt76_set(dev, MT_WF_PHY_MIN_PRI_PWR(0),
MT_WF_PHY_PD_BLK(0));
mt76_set(dev, MT_WF_PHY_MIN_PRI_PWR(1),
MT_WF_PHY_PD_BLK(1));
mt76_set(dev, MT_WF_PHY_MIN_PRI_PWR(ext_phy),
MT_WF_PHY_PD_BLK(ext_phy));
if (is_mt7622(&dev->mt76)) {
mt76_set(dev, MT_MIB_M0_MISC_CR(0), 0x7 << 8);
mt76_set(dev, MT_MIB_M0_MISC_CR(0), 0x7);
}
} else {
mt76_clear(dev, MT_WF_PHY_MIN_PRI_PWR(0),
MT_WF_PHY_PD_BLK(0));
mt76_clear(dev, MT_WF_PHY_MIN_PRI_PWR(1),
MT_WF_PHY_PD_BLK(1));
mt76_clear(dev, MT_WF_PHY_MIN_PRI_PWR(ext_phy),
MT_WF_PHY_PD_BLK(ext_phy));
}
mt7615_mac_set_default_sensitivity(&dev->phy);
ext_phy = mt7615_ext_phy(dev);
if (ext_phy)
mt7615_mac_set_default_sensitivity(ext_phy);
dev->scs_en = enable;
mt7615_mac_set_default_sensitivity(phy);
phy->scs_en = enable;
out:
mutex_unlock(&dev->mt76.mutex);
......@@ -1663,7 +1656,7 @@ mt7615_mac_scs_check(struct mt7615_phy *phy)
u32 mdrdy_cck, mdrdy_ofdm, pd_cck, pd_ofdm;
bool ext_phy = phy != &dev->phy;
if (!dev->scs_en)
if (!phy->scs_en)
return;
val = mt76_rr(dev, MT_WF_PHY_R0_PHYCTRL_STS0(ext_phy));
......
......@@ -130,6 +130,8 @@ struct mt7615_phy {
u16 noise;
bool scs_en;
unsigned long last_cca_adj;
int false_cca_ofdm, false_cca_cck;
s8 ofdm_sensitivity;
......@@ -211,7 +213,6 @@ struct mt7615_dev {
u32 hw_pattern;
u8 mac_work_count;
bool scs_en;
bool fw_debug;
spinlock_t token_lock;
......@@ -369,7 +370,7 @@ void mt7615_update_channel(struct mt76_dev *mdev);
bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
void mt7615_mac_reset_counters(struct mt7615_dev *dev);
void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
void mt7615_mac_set_scs(struct mt7615_dev *dev, bool enable);
void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
void mt7615_mac_sta_poll(struct mt7615_dev *dev);
int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
......
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