Commit 59cf1496 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo

ARM: dts: imx7ulp: Move usdhc clocks assignment to board DT

usdhc's clock rate is different according to different devices
connected, so clock rate assignment should be placed in board
DT according to different devices connected on each usdhc port.
Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent f2c03b89
...@@ -77,6 +77,8 @@ &usbotg1 { ...@@ -77,6 +77,8 @@ &usbotg1 {
}; };
&usdhc0 { &usdhc0 {
assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc0>; pinctrl-0 = <&pinctrl_usdhc0>;
cd-gpios = <&gpio_ptc 10 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio_ptc 10 GPIO_ACTIVE_LOW>;
......
...@@ -223,8 +223,6 @@ usdhc0: mmc@40370000 { ...@@ -223,8 +223,6 @@ usdhc0: mmc@40370000 {
<&scg1 IMX7ULP_CLK_NIC1_DIV>, <&scg1 IMX7ULP_CLK_NIC1_DIV>,
<&pcc2 IMX7ULP_CLK_USDHC0>; <&pcc2 IMX7ULP_CLK_USDHC0>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
bus-width = <4>; bus-width = <4>;
fsl,tuning-start-tap = <20>; fsl,tuning-start-tap = <20>;
fsl,tuning-step = <2>; fsl,tuning-step = <2>;
...@@ -239,8 +237,6 @@ usdhc1: mmc@40380000 { ...@@ -239,8 +237,6 @@ usdhc1: mmc@40380000 {
<&scg1 IMX7ULP_CLK_NIC1_DIV>, <&scg1 IMX7ULP_CLK_NIC1_DIV>,
<&pcc2 IMX7ULP_CLK_USDHC1>; <&pcc2 IMX7ULP_CLK_USDHC1>;
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC1>;
assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
bus-width = <4>; bus-width = <4>;
fsl,tuning-start-tap = <20>; fsl,tuning-start-tap = <20>;
fsl,tuning-step = <2>; fsl,tuning-step = <2>;
......
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