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Commit 5a124fe0 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Krzysztof Kozlowski
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ARM: dts: exynos: Move common nodes to exynos5.dtsi 

Exynos5420 and Exynos5250 share some nodes: the PWM, syscon
(sysreg_system_controller) and first four I2C controllers. Move them to
parent DTSI to avoid duplication.
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
Tested-by: default avatarJavier Martinez Canillas <javier@osg.samsung.com>
parent 8c2bd87e
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Showing with 124 additions and 148 deletions
arch/arm/boot/dts/exynos5.dtsi
View file @ 5a124fe0
......@@ -20,6 +20,10 @@ / {
interrupt-parent = <&gic>;
aliases {
i2c0 = &i2c_0;
i2c1 = &i2c_1;
i2c2 = &i2c_2;
i2c3 = &i2c_3;
serial0 = &serial_0;
serial1 = &serial_1;
serial2 = &serial_2;
......@@ -63,6 +67,11 @@ gic: interrupt-controller@10481000 {
interrupts = <1 9 0xf04>;
};
sysreg_system_controller: syscon@10050000 {
compatible = "samsung,exynos5-sysreg", "syscon";
reg = <0x10050000 0x5000>;
};
serial_0: serial@12C00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
......@@ -87,6 +96,53 @@ serial_3: serial@12C30000 {
interrupts = <0 54 0>;
};
i2c_0: i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <0 56 0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_1: i2c@12C70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <0 57 0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_2: i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <0 58 0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_3: i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <0 59 0>;
#address-cells = <1>;
#size-cells = <0>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
pwm: pwm@12DD0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12DD0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
};
rtc: rtc@101E0000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>;
......
arch/arm/boot/dts/exynos5250.dtsi
View file @ 5a124fe0
......@@ -37,10 +37,6 @@ aliases {
mshc1 = &mmc_1;
mshc2 = &mmc_2;
mshc3 = &mmc_3;
i2c0 = &i2c_0;
i2c1 = &i2c_1;
i2c2 = &i2c_2;
i2c3 = &i2c_3;
i2c4 = &i2c_4;
i2c5 = &i2c_5;
i2c6 = &i2c_6;
......@@ -235,11 +231,6 @@ pmu_system_controller: system-controller@10040000 {
interrupt-parent = <&gic>;
};
sysreg_system_controller: syscon@10050000 {
compatible = "samsung,exynos5-sysreg", "syscon";
reg = <0x10050000 0x5000>;
};
watchdog@101D0000 {
compatible = "samsung,exynos5250-wdt";
reg = <0x101D0000 0x100>;
......@@ -328,62 +319,7 @@ sata_phy: sata-phy@12170000 {
status = "disabled";
};
i2c_0: i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <0 56 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_1: i2c@12C70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <0 57 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C1>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_2: i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <0 58 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_3: i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <0 59 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C3>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
/* i2c_0-3 are defined in exynos5.dtsi */
i2c_4: i2c@12CA0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CA0000 0x100>;
......@@ -662,15 +598,6 @@ usb2_phy_gen: phy@12130000 {
samsung,pmureg-phandle = <&pmu_system_controller>;
};
pwm: pwm@12dd0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12dd0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
clocks = <&clock CLK_PWM>;
clock-names = "timers";
};
amba {
#address-cells = <1>;
#size-cells = <1>;
......@@ -1070,6 +997,39 @@ &fimd {
iommus = <&sysmmu_fimd1>;
};
&i2c_0 {
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
};
&i2c_1 {
clocks = <&clock CLK_I2C1>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
};
&i2c_2 {
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
};
&i2c_3 {
clocks = <&clock CLK_I2C3>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
};
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
};
&rtc {
clocks = <&clock CLK_RTC>;
clock-names = "rtc";
......
arch/arm/boot/dts/exynos5420.dtsi
View file @ 5a124fe0
......@@ -30,10 +30,6 @@ aliases {
pinctrl2 = &pinctrl_2;
pinctrl3 = &pinctrl_3;
pinctrl4 = &pinctrl_4;
i2c0 = &i2c_0;
i2c1 = &i2c_1;
i2c2 = &i2c_2;
i2c3 = &i2c_3;
i2c4 = &hsi2c_4;
i2c5 = &hsi2c_5;
i2c6 = &hsi2c_6;
......@@ -578,15 +574,6 @@ spi_2: spi@12d40000 {
status = "disabled";
};
pwm: pwm@12dd0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12dd0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
clocks = <&clock CLK_PWM>;
clock-names = "timers";
};
dp_phy: dp-video-phy {
compatible = "samsung,exynos5420-dp-video-phy";
samsung,pmu-syscon = <&pmu_system_controller>;
......@@ -624,62 +611,7 @@ adc: adc@12D10000 {
status = "disabled";
};
i2c_0: i2c@12C60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <0 56 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_1: i2c@12C70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <0 57 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C1>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_2: i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <0 58 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
i2c_3: i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <0 59 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_I2C3>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
/* i2c_0-3 are defined in exynos5.dtsi */
hsi2c_4: i2c@12CA0000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12CA0000 0x1000>;
......@@ -859,11 +791,6 @@ pmu_system_controller: system-controller@10040000 {
interrupt-parent = <&gic>;
};
sysreg_system_controller: syscon@10050000 {
compatible = "samsung,exynos5-sysreg", "syscon";
reg = <0x10050000 0x5000>;
};
tmu_cpu0: tmu@10060000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10060000 0x100>;
......@@ -1614,6 +1541,39 @@ &fimd {
iommu-names = "m0", "m1";
};
&i2c_0 {
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
};
&i2c_1 {
clocks = <&clock CLK_I2C1>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
};
&i2c_2 {
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
};
&i2c_3 {
clocks = <&clock CLK_I2C3>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
};
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";
};
&rtc {
clocks = <&clock CLK_RTC>;
clock-names = "rtc";
......
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