Commit 5e395e14 authored by Yixun Lan's avatar Yixun Lan Committed by Kevin Hilman

ARM64: dts: meson-axg: add an 32K alt aoclk

The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE domain.
Acked-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent 0df8fbb9
...@@ -108,6 +108,13 @@ xtal: xtal-clk { ...@@ -108,6 +108,13 @@ xtal: xtal-clk {
#clock-cells = <0>; #clock-cells = <0>;
}; };
ao_alt_xtal: ao_alt_xtal-clk {
compatible = "fixed-clock";
clock-frequency = <32000000>;
clock-output-names = "ao_alt_xtal";
#clock-cells = <0>;
};
soc { soc {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;
......
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