Commit 60b3b4d2 authored by Hans Verkuil's avatar Hans Verkuil Committed by Mauro Carvalho Chehab

[media] cx25821: fix sparse warnings

drivers/media/pci/cx25821/cx25821-cards.c:49:20: warning: symbol 'cx25821_bcount' was not declared. Should it be static?
drivers/media/pci/cx25821/cx25821-video-upstream.c:162:33: warning: incorrect type in assignment (different base types)
drivers/media/pci/cx25821/cx25821-video-upstream.c:163:33: warning: incorrect type in assignment (different base types)
drivers/media/pci/cx25821/cx25821-video-upstream.c:164:33: warning: incorrect type in assignment (different base types)
drivers/media/pci/cx25821/cx25821-video-upstream.c:165:33: warning: incorrect type in assignment (different base types)
drivers/media/pci/cx25821/cx25821-medusa-video.h:43:16: warning: symbol '_num_decoders' was not declared. Should it be static?
drivers/media/pci/cx25821/cx25821-medusa-video.h:44:16: warning: symbol '_num_cameras' was not declared. Should it be static?
drivers/media/pci/cx25821/cx25821-medusa-video.h:46:14: warning: symbol '_video_standard' was not declared. Should it be static?
drivers/media/pci/cx25821/cx25821-medusa-video.h:47:5: warning: symbol '_display_field_cnt' was not declared. Should it be static?
After analyzing the last four warnings carefully it became clear that these
variables were really completely unused. As a result of that the call to
medusa_set_decoderduration() is now dubious since the duration is always 0.
Without documentation, however, I can't tell what the right value is.
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent c8d185ce
......@@ -45,5 +45,3 @@ struct cx25821_board cx25821_boards[] = {
},
};
const unsigned int cx25821_bcount = ARRAY_SIZE(cx25821_boards);
......@@ -438,7 +438,7 @@ void medusa_set_resolution(struct cx25821_dev *dev, int width,
decoder_count = decoder_select + 1;
} else {
decoder = 0;
decoder_count = _num_decoders;
decoder_count = dev->_max_num_decoders;
}
switch (width) {
......@@ -506,8 +506,6 @@ static void medusa_set_decoderduration(struct cx25821_dev *dev, int decoder,
break;
}
_display_field_cnt[decoder] = duration;
/* update hardware */
fld_cnt = cx25821_i2c_read(&dev->i2c_bus[0], disp_cnt_reg, &tmp);
......@@ -667,8 +665,6 @@ int medusa_video_init(struct cx25821_dev *dev)
int ret_val = 0;
int i = 0;
_num_decoders = dev->_max_num_decoders;
/* disable Auto source selection on all video decoders */
value = cx25821_i2c_read(&dev->i2c_bus[0], MON_A_CTRL, &tmp);
value &= 0xFFFFF0FF;
......@@ -685,8 +681,14 @@ int medusa_video_init(struct cx25821_dev *dev)
if (ret_val < 0)
goto error;
for (i = 0; i < _num_decoders; i++)
medusa_set_decoderduration(dev, i, _display_field_cnt[i]);
/*
* FIXME: due to a coding bug the duration was always 0. It's
* likely that it really should be something else, but due to the
* lack of documentation I have no idea what it should be. For
* now just fill in 0 as the duration.
*/
for (i = 0; i < dev->_max_num_decoders; i++)
medusa_set_decoderduration(dev, i, 0);
/* Select monitor as DENC A input, power up the DAC */
value = cx25821_i2c_read(&dev->i2c_bus[0], DENC_AB_CTRL, &tmp);
......@@ -717,7 +719,7 @@ int medusa_video_init(struct cx25821_dev *dev)
/* Turn on all of the data out and control output pins. */
value = cx25821_i2c_read(&dev->i2c_bus[0], PIN_OE_CTRL, &tmp);
value &= 0xFEF0FE00;
if (_num_decoders == MAX_DECODERS) {
if (dev->_max_num_decoders == MAX_DECODERS) {
/*
* Note: The octal board does not support control pins(bit16-19)
* These bits are ignored in the octal board.
......
......@@ -40,10 +40,4 @@
#define CONTRAST_DEFAULT 5000
#define HUE_DEFAULT 5000
unsigned short _num_decoders;
unsigned short _num_cameras;
unsigned int _video_standard;
int _display_field_cnt[MAX_DECODERS];
#endif
......@@ -159,10 +159,10 @@ static __le32 *cx25821_risc_field_upstream(struct cx25821_channel *chan, __le32
* For the upstream video channel, the risc engine will enable
* the FIFO. */
if (fifo_enable && line == 3) {
*(rp++) = RISC_WRITECR;
*(rp++) = sram_ch->dma_ctl;
*(rp++) = FLD_VID_FIFO_EN;
*(rp++) = 0x00000001;
*(rp++) = cpu_to_le32(RISC_WRITECR);
*(rp++) = cpu_to_le32(sram_ch->dma_ctl);
*(rp++) = cpu_to_le32(FLD_VID_FIFO_EN);
*(rp++) = cpu_to_le32(0x00000001);
}
}
......
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