Commit 60b431b5 authored by James Zhu's avatar James Zhu Committed by Alex Deucher

drm/amdgpu:Fixed wrong emit frame size for enc

Emit frame size should match with corresponding function,
uvd_v6_0_enc_ring_emit_vm_flush has 5 amdgpu_ring_write
Signed-off-by: default avatarJames Zhu <James.Zhu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fe19b862
...@@ -1580,7 +1580,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_enc_ring_vm_funcs = { ...@@ -1580,7 +1580,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_enc_ring_vm_funcs = {
.set_wptr = uvd_v6_0_enc_ring_set_wptr, .set_wptr = uvd_v6_0_enc_ring_set_wptr,
.emit_frame_size = .emit_frame_size =
4 + /* uvd_v6_0_enc_ring_emit_pipeline_sync */ 4 + /* uvd_v6_0_enc_ring_emit_pipeline_sync */
6 + /* uvd_v6_0_enc_ring_emit_vm_flush */ 5 + /* uvd_v6_0_enc_ring_emit_vm_flush */
5 + 5 + /* uvd_v6_0_enc_ring_emit_fence x2 vm fence */ 5 + 5 + /* uvd_v6_0_enc_ring_emit_fence x2 vm fence */
1, /* uvd_v6_0_enc_ring_insert_end */ 1, /* uvd_v6_0_enc_ring_insert_end */
.emit_ib_size = 5, /* uvd_v6_0_enc_ring_emit_ib */ .emit_ib_size = 5, /* uvd_v6_0_enc_ring_emit_ib */
......
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