Commit 61bf3293 authored by Mauro Rossi's avatar Mauro Rossi Committed by Alex Deucher

drm/amd/display: dc/irq: add support for DCE6 (v4)

[Why]
irq service requires changes for DCE6 support

[How]
(v1) DCE6 targets are added replicating existing DCE8 implementation.
     due to missing CRTC_VERTICAL_INTERRUPT0_CONTROL registers/masks,
     dce/dce_8_0_{d,sh_mask}.h used instead of dce/dce_6_0_{d,sh_mask}.h

(v2) DCE6 headers used adding the necessary vblank irq registers
     (INT_MASK and VBLANK_STATUS) and vblank irq masks as implemented
     in amdgpu driver.
     Add vblank_irq_info_funcs_dce60 with .set and .ack as per commit
     b10d51f8 ("drm/amd/display: Add interrupt entries for VBLANK isr.")
     and use it in vblank_int_entry(reg_num) macro definition

(v3) updated due to following kernel 5.3 commit:
     4fc4dca8 ("drm/amd: drop use of drmp.h in os_types.h")

(v4) updated due to following kernel 5.6 commit:
     d9e32672 ("drm/amd/display: cleanup of construct and destruct funcs")
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarMauro Rossi <issor.oruam@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b168930d
...@@ -30,6 +30,17 @@ AMD_DAL_IRQ = $(addprefix $(AMDDALPATH)/dc/irq/,$(IRQ)) ...@@ -30,6 +30,17 @@ AMD_DAL_IRQ = $(addprefix $(AMDDALPATH)/dc/irq/,$(IRQ))
AMD_DISPLAY_FILES += $(AMD_DAL_IRQ) AMD_DISPLAY_FILES += $(AMD_DAL_IRQ)
###############################################################################
# DCE 6x
###############################################################################
ifdef CONFIG_DRM_AMD_DC_SI
IRQ_DCE60 = irq_service_dce60.o
AMD_DAL_IRQ_DCE60 = $(addprefix $(AMDDALPATH)/dc/irq/dce60/,$(IRQ_DCE60))
AMD_DISPLAY_FILES += $(AMD_DAL_IRQ_DCE60)
endif
############################################################################### ###############################################################################
# DCE 8x # DCE 8x
############################################################################### ###############################################################################
......
This diff is collapsed.
/*
* Copyright 2020 Mauro Rossi <issor.oruam@gmail.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#ifndef __DAL_IRQ_SERVICE_DCE60_H__
#define __DAL_IRQ_SERVICE_DCE60_H__
#include "../irq_service.h"
enum dc_irq_source to_dal_irq_source_dce60(
struct irq_service *irq_service,
uint32_t src_id,
uint32_t ext_id);
struct irq_service *dal_irq_service_dce60_create(
struct irq_service_init_data *init_data);
#endif
...@@ -32,6 +32,9 @@ ...@@ -32,6 +32,9 @@
#include "dce110/irq_service_dce110.h" #include "dce110/irq_service_dce110.h"
#if defined(CONFIG_DRM_AMD_DC_SI)
#include "dce60/irq_service_dce60.h"
#endif
#include "dce80/irq_service_dce80.h" #include "dce80/irq_service_dce80.h"
......
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