Commit 6462c616 authored by Thomas Reitmayr's avatar Thomas Reitmayr Committed by Nicolas Pitre

[ARM] orion5x: Change names of defines for Reset-Out-Mask register

The name of the define for the Reset-Out-Mask register as well as its
bit for the watchdog reset are changed to match the names used for
Kirkwood (which in turn match the processor specification more
closely). There is no functional change.

This patch prepares for adding orion5x_wdt as a platform device to
Kirkwood.
Signed-off-by: default avatarThomas Reitmayr <treitmayr@devbase.at>
Signed-off-by: default avatarNicolas Pitre <nico@marvell.com>
parent e8b2b7ba
...@@ -17,8 +17,8 @@ ...@@ -17,8 +17,8 @@
#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104) #define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104)
#define CPU_RESET_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108) #define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108)
#define WDT_RESET 0x0002 #define WDT_RESET_OUT_EN 0x0002
#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) #define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c)
......
...@@ -23,7 +23,7 @@ static inline void arch_reset(char mode, const char *cmd) ...@@ -23,7 +23,7 @@ static inline void arch_reset(char mode, const char *cmd)
/* /*
* Enable and issue soft reset * Enable and issue soft reset
*/ */
orion5x_setbits(CPU_RESET_MASK, (1 << 2)); orion5x_setbits(RSTOUTn_MASK, (1 << 2));
orion5x_setbits(CPU_SOFT_RESET, 1); orion5x_setbits(CPU_SOFT_RESET, 1);
} }
......
...@@ -181,9 +181,9 @@ static void mss2_power_off(void) ...@@ -181,9 +181,9 @@ static void mss2_power_off(void)
/* /*
* Enable and issue soft reset * Enable and issue soft reset
*/ */
reg = readl(CPU_RESET_MASK); reg = readl(RSTOUTn_MASK);
reg |= 1 << 2; reg |= 1 << 2;
writel(reg, CPU_RESET_MASK); writel(reg, RSTOUTn_MASK);
reg = readl(CPU_SOFT_RESET); reg = readl(CPU_SOFT_RESET);
reg |= 1; reg |= 1;
......
...@@ -73,9 +73,9 @@ static void orion5x_wdt_enable(void) ...@@ -73,9 +73,9 @@ static void orion5x_wdt_enable(void)
writel(reg, TIMER_CTRL); writel(reg, TIMER_CTRL);
/* Enable reset on watchdog */ /* Enable reset on watchdog */
reg = readl(CPU_RESET_MASK); reg = readl(RSTOUTn_MASK);
reg |= WDT_RESET; reg |= WDT_RESET_OUT_EN;
writel(reg, CPU_RESET_MASK); writel(reg, RSTOUTn_MASK);
spin_unlock(&wdt_lock); spin_unlock(&wdt_lock);
} }
...@@ -87,9 +87,9 @@ static void orion5x_wdt_disable(void) ...@@ -87,9 +87,9 @@ static void orion5x_wdt_disable(void)
spin_lock(&wdt_lock); spin_lock(&wdt_lock);
/* Disable reset on watchdog */ /* Disable reset on watchdog */
reg = readl(CPU_RESET_MASK); reg = readl(RSTOUTn_MASK);
reg &= ~WDT_RESET; reg &= ~WDT_RESET_OUT_EN;
writel(reg, CPU_RESET_MASK); writel(reg, RSTOUTn_MASK);
/* Disable watchdog timer */ /* Disable watchdog timer */
reg = readl(TIMER_CTRL); reg = readl(TIMER_CTRL);
......
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