Commit 65ae8d26 authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Ralf Baechle

MIPS16e2: Provide feature overrides for non-MIPS16 systems

Hardcode the absence of the MIPS16e2 ASE for all the systems that do so
for the MIPS16 ASE already, providing for code to be optimized away.
Signed-off-by: default avatarMaciej W. Rozycki <macro@imgtec.com>
Reviewed-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16097/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 92ecd19a
...@@ -40,6 +40,7 @@ ...@@ -40,6 +40,7 @@
#endif #endif
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -31,6 +31,7 @@ ...@@ -31,6 +31,7 @@
#define cpu_has_ejtag 1 #define cpu_has_ejtag 1
#define cpu_has_llsc 1 #define cpu_has_llsc 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#define cpu_has_ejtag 1 #define cpu_has_ejtag 1
#define cpu_has_llsc 1 #define cpu_has_llsc 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
#endif #endif
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
#define cpu_has_mcheck 0 #define cpu_has_mcheck 0
#define cpu_has_ejtag 0 #define cpu_has_ejtag 0
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -19,6 +19,7 @@ ...@@ -19,6 +19,7 @@
#define cpu_has_32fpr 1 #define cpu_has_32fpr 1
#define cpu_has_counter 1 #define cpu_has_counter 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_divec 0 #define cpu_has_divec 0
#define cpu_has_cache_cdex_p 1 #define cpu_has_cache_cdex_p 1
#define cpu_has_prefetch 0 #define cpu_has_prefetch 0
......
...@@ -43,6 +43,7 @@ ...@@ -43,6 +43,7 @@
#define cpu_has_ejtag 0 #define cpu_has_ejtag 0
#define cpu_has_llsc 1 #define cpu_has_llsc 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
*/ */
#define cpu_has_watch 1 #define cpu_has_watch 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_divec 0 #define cpu_has_divec 0
#define cpu_has_vce 0 #define cpu_has_vce 0
#define cpu_has_cache_cdex_p 0 #define cpu_has_cache_cdex_p 0
......
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#define cpu_has_32fpr 1 #define cpu_has_32fpr 1
#define cpu_has_counter 1 #define cpu_has_counter 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_vce 0 #define cpu_has_vce 0
#define cpu_has_cache_cdex_s 0 #define cpu_has_cache_cdex_s 0
#define cpu_has_mcheck 0 #define cpu_has_mcheck 0
......
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#define cpu_has_ejtag 1 #define cpu_has_ejtag 1
#define cpu_has_llsc 1 #define cpu_has_llsc 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#define cpu_has_mcheck 0 #define cpu_has_mcheck 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_mipsmt 0 #define cpu_has_mipsmt 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#define cpu_has_4k_cache 1 #define cpu_has_4k_cache 1
#define cpu_has_watch 1 #define cpu_has_watch 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_counter 1 #define cpu_has_counter 1
#define cpu_has_divec 1 #define cpu_has_divec 1
#define cpu_has_vce 0 #define cpu_has_vce 0
......
...@@ -48,6 +48,7 @@ ...@@ -48,6 +48,7 @@
#define cpu_has_llsc 1 #define cpu_has_llsc 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#define cpu_has_counter 1 #define cpu_has_counter 1
#define cpu_has_watch 0 #define cpu_has_watch 0
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_divec 0 #define cpu_has_divec 0
#define cpu_has_cache_cdex_p 1 #define cpu_has_cache_cdex_p 1
#define cpu_has_prefetch 0 #define cpu_has_prefetch 0
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
*/ */
#define cpu_has_watch 1 #define cpu_has_watch 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_divec 1 #define cpu_has_divec 1
#define cpu_has_vce 0 #define cpu_has_vce 0
#define cpu_has_cache_cdex_p 0 #define cpu_has_cache_cdex_p 0
......
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
#define cpu_has_inclusive_pcaches 0 #define cpu_has_inclusive_pcaches 0
#define cpu_has_mips16 0 #define cpu_has_mips16 0
#define cpu_has_mips16e2 0
#define cpu_has_mdmx 0 #define cpu_has_mdmx 0
#define cpu_has_mips3d 0 #define cpu_has_mips3d 0
#define cpu_has_smartmips 0 #define cpu_has_smartmips 0
......
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