Commit 69582b88 authored by Lars-Peter Clausen's avatar Lars-Peter Clausen Committed by Jonathan Cameron

staging:iio:ad799x: Simplify threshold register look-up

Given a channel number the corresponding threshold and hysteresis registers can
easily be calculated. No need to use a look-up table.
Signed-off-by: default avatarLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: default avatarJonathan Cameron <jic23@kernel.org>
parent ec6670ae
...@@ -36,18 +36,10 @@ ...@@ -36,18 +36,10 @@
#define AD7998_ALERT_STAT_REG 0x1 #define AD7998_ALERT_STAT_REG 0x1
#define AD7998_CONF_REG 0x2 #define AD7998_CONF_REG 0x2
#define AD7998_CYCLE_TMR_REG 0x3 #define AD7998_CYCLE_TMR_REG 0x3
#define AD7998_DATALOW_CH1_REG 0x4
#define AD7998_DATAHIGH_CH1_REG 0x5 #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
#define AD7998_HYST_CH1_REG 0x6 #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
#define AD7998_DATALOW_CH2_REG 0x7 #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
#define AD7998_DATAHIGH_CH2_REG 0x8
#define AD7998_HYST_CH2_REG 0x9
#define AD7998_DATALOW_CH3_REG 0xA
#define AD7998_DATAHIGH_CH3_REG 0xB
#define AD7998_HYST_CH3_REG 0xC
#define AD7998_DATALOW_CH4_REG 0xD
#define AD7998_DATAHIGH_CH4_REG 0xE
#define AD7998_HYST_CH4_REG 0xF
#define AD7998_CYC_MASK 0x7 #define AD7998_CYC_MASK 0x7
#define AD7998_CYC_DIS 0x0 #define AD7998_CYC_DIS 0x0
......
...@@ -259,12 +259,14 @@ static int ad799x_read_event_config(struct iio_dev *indio_dev, ...@@ -259,12 +259,14 @@ static int ad799x_read_event_config(struct iio_dev *indio_dev,
return 1; return 1;
} }
static const u8 ad799x_threshold_addresses[][2] = { static int ad799x_threshold_reg(const struct iio_chan_spec *chan,
{ AD7998_DATALOW_CH1_REG, AD7998_DATAHIGH_CH1_REG }, enum iio_event_direction dir)
{ AD7998_DATALOW_CH2_REG, AD7998_DATAHIGH_CH2_REG }, {
{ AD7998_DATALOW_CH3_REG, AD7998_DATAHIGH_CH3_REG }, if (dir == IIO_EV_DIR_FALLING)
{ AD7998_DATALOW_CH4_REG, AD7998_DATAHIGH_CH4_REG }, return AD7998_DATALOW_REG(chan->channel);
}; else
return AD7998_DATAHIGH_REG(chan->channel);
}
static int ad799x_write_event_value(struct iio_dev *indio_dev, static int ad799x_write_event_value(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan, const struct iio_chan_spec *chan,
...@@ -275,13 +277,9 @@ static int ad799x_write_event_value(struct iio_dev *indio_dev, ...@@ -275,13 +277,9 @@ static int ad799x_write_event_value(struct iio_dev *indio_dev,
{ {
int ret; int ret;
struct ad799x_state *st = iio_priv(indio_dev); struct ad799x_state *st = iio_priv(indio_dev);
int direction = dir == IIO_EV_DIR_FALLING;
int number = chan->channel;
mutex_lock(&indio_dev->mlock); mutex_lock(&indio_dev->mlock);
ret = ad799x_i2c_write16(st, ret = ad799x_i2c_write16(st, ad799x_threshold_reg(chan, dir), val);
ad799x_threshold_addresses[number][direction],
val);
mutex_unlock(&indio_dev->mlock); mutex_unlock(&indio_dev->mlock);
return ret; return ret;
...@@ -296,14 +294,10 @@ static int ad799x_read_event_value(struct iio_dev *indio_dev, ...@@ -296,14 +294,10 @@ static int ad799x_read_event_value(struct iio_dev *indio_dev,
{ {
int ret; int ret;
struct ad799x_state *st = iio_priv(indio_dev); struct ad799x_state *st = iio_priv(indio_dev);
int direction = dir == IIO_EV_DIR_FALLING;
int number = chan->channel;
u16 valin; u16 valin;
mutex_lock(&indio_dev->mlock); mutex_lock(&indio_dev->mlock);
ret = ad799x_i2c_read16(st, ret = ad799x_i2c_read16(st, ad799x_threshold_reg(chan, dir), &valin);
ad799x_threshold_addresses[number][direction],
&valin);
mutex_unlock(&indio_dev->mlock); mutex_unlock(&indio_dev->mlock);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -391,25 +385,25 @@ static IIO_DEVICE_ATTR(in_voltage0_thresh_both_hyst_raw, ...@@ -391,25 +385,25 @@ static IIO_DEVICE_ATTR(in_voltage0_thresh_both_hyst_raw,
S_IRUGO | S_IWUSR, S_IRUGO | S_IWUSR,
ad799x_read_channel_config, ad799x_read_channel_config,
ad799x_write_channel_config, ad799x_write_channel_config,
AD7998_HYST_CH1_REG); AD7998_HYST_REG(0));
static IIO_DEVICE_ATTR(in_voltage1_thresh_both_hyst_raw, static IIO_DEVICE_ATTR(in_voltage1_thresh_both_hyst_raw,
S_IRUGO | S_IWUSR, S_IRUGO | S_IWUSR,
ad799x_read_channel_config, ad799x_read_channel_config,
ad799x_write_channel_config, ad799x_write_channel_config,
AD7998_HYST_CH2_REG); AD7998_HYST_REG(1));
static IIO_DEVICE_ATTR(in_voltage2_thresh_both_hyst_raw, static IIO_DEVICE_ATTR(in_voltage2_thresh_both_hyst_raw,
S_IRUGO | S_IWUSR, S_IRUGO | S_IWUSR,
ad799x_read_channel_config, ad799x_read_channel_config,
ad799x_write_channel_config, ad799x_write_channel_config,
AD7998_HYST_CH3_REG); AD7998_HYST_REG(2));
static IIO_DEVICE_ATTR(in_voltage3_thresh_both_hyst_raw, static IIO_DEVICE_ATTR(in_voltage3_thresh_both_hyst_raw,
S_IRUGO | S_IWUSR, S_IRUGO | S_IWUSR,
ad799x_read_channel_config, ad799x_read_channel_config,
ad799x_write_channel_config, ad799x_write_channel_config,
AD7998_HYST_CH4_REG); AD7998_HYST_REG(3));
static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
ad799x_read_frequency, ad799x_read_frequency,
......
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