Commit 6ae3f8ad authored by Russell Currey's avatar Russell Currey Committed by Michael Ellerman

powerpc: Add POWER9 architected mode to cputable

PVR value of 0x0F000005 means we are arch v3.00 compliant (i.e. POWER9).
Acked-by: default avatarMichael Neuling <mikey@neuling.org>
Signed-off-by: default avatarRussell Currey <ruscur@russell.cc>
[mpe: Don't set num_pmcs, so we keep the PMU fields from the raw entry]
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent a2391b35
...@@ -386,6 +386,23 @@ static struct cpu_spec __initdata cpu_specs[] = { ...@@ -386,6 +386,23 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check_early = __machine_check_early_realmode_p8, .machine_check_early = __machine_check_early_realmode_p8,
.platform = "power8", .platform = "power8",
}, },
{ /* 3.00-compliant processor, i.e. Power9 "architected" mode */
.pvr_mask = 0xffffffff,
.pvr_value = 0x0f000005,
.cpu_name = "POWER9 (architected)",
.cpu_features = CPU_FTRS_POWER9,
.cpu_user_features = COMMON_USER_POWER9,
.cpu_user_features2 = COMMON_USER2_POWER9,
.mmu_features = MMU_FTRS_POWER9,
.icache_bsize = 128,
.dcache_bsize = 128,
.oprofile_type = PPC_OPROFILE_INVALID,
.oprofile_cpu_type = "ppc64/ibm-compat-v1",
.cpu_setup = __setup_cpu_power9,
.cpu_restore = __restore_cpu_power9,
.flush_tlb = __flush_tlb_power9,
.platform = "power9",
},
{ /* Power7 */ { /* Power7 */
.pvr_mask = 0xffff0000, .pvr_mask = 0xffff0000,
.pvr_value = 0x003f0000, .pvr_value = 0x003f0000,
......
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