Commit 6e1715f7 authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Ralf Baechle

MIPS: math-emu: dsemul: Correct description of the emulation frame

Remove irrelevant content from the description of the emulation frame in
`mips_dsemul', referring to bare-metal configurations.  Update the text,
reflecting the change made with commit ba3049ed ("MIPS: Switch FPU
emulator trap to BREAK instruction."), where we switched from using an
address error exception on an unaligned access to the use of a BREAK 514
instruction causing a breakpoint exception instead.
Signed-off-by: default avatarMaciej W. Rozycki <macro@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12176/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 69a1e6cb
...@@ -78,13 +78,8 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc) ...@@ -78,13 +78,8 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc)
* Algorithmics used a system call instruction, and * Algorithmics used a system call instruction, and
* borrowed that vector. MIPS/Linux version is a bit * borrowed that vector. MIPS/Linux version is a bit
* more heavyweight in the interests of portability and * more heavyweight in the interests of portability and
* multiprocessor support. For Linux we generate a * multiprocessor support. For Linux we use a BREAK 514
* an unaligned access and force an address error exception. * instruction causing a breakpoint exception.
*
* For embedded systems (stand-alone) we prefer to use a
* non-existing CP1 instruction. This prevents us from emulating
* branches, but gives us a cleaner interface to the exception
* handler (single entry point).
*/ */
break_math = BREAK_MATH(get_isa16_mode(regs->cp0_epc)); break_math = BREAK_MATH(get_isa16_mode(regs->cp0_epc));
......
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