Commit 6f44610c authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Geert Uytterhoeven

clk: renesas: r8a77970: Add RPC clocks

On R-Car V3M (R8A77970), the RPC/RPCD2 clocks are output by the common
divider. Describe them, as well as the RPC-IF module clock.
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 507c93a2
...@@ -91,6 +91,9 @@ static const struct cpg_core_clk r8a77970_core_clks[] __initconst = { ...@@ -91,6 +91,9 @@ static const struct cpg_core_clk r8a77970_core_clks[] __initconst = {
CLK_PLL1_DIV2), CLK_PLL1_DIV2),
DEF_BASE("sd0", R8A77970_CLK_SD0, CLK_TYPE_R8A77970_SD0, CLK_PLL1_DIV2), DEF_BASE("sd0", R8A77970_CLK_SD0, CLK_TYPE_R8A77970_SD0, CLK_PLL1_DIV2),
DEF_FIXED("rpc", R8A77970_CLK_RPC, CLK_PLL1_DIV2, 5, 1),
DEF_FIXED("rpcd2", R8A77970_CLK_RPCD2, CLK_PLL1_DIV2, 10, 1),
DEF_FIXED("cl", R8A77970_CLK_CL, CLK_PLL1_DIV2, 48, 1), DEF_FIXED("cl", R8A77970_CLK_CL, CLK_PLL1_DIV2, 48, 1),
DEF_FIXED("cp", R8A77970_CLK_CP, CLK_EXTAL, 2, 1), DEF_FIXED("cp", R8A77970_CLK_CP, CLK_EXTAL, 2, 1),
...@@ -152,6 +155,7 @@ static const struct mssr_mod_clk r8a77970_mod_clks[] __initconst = { ...@@ -152,6 +155,7 @@ static const struct mssr_mod_clk r8a77970_mod_clks[] __initconst = {
DEF_MOD("gpio1", 911, R8A77970_CLK_CP), DEF_MOD("gpio1", 911, R8A77970_CLK_CP),
DEF_MOD("gpio0", 912, R8A77970_CLK_CP), DEF_MOD("gpio0", 912, R8A77970_CLK_CP),
DEF_MOD("can-fd", 914, R8A77970_CLK_S2D2), DEF_MOD("can-fd", 914, R8A77970_CLK_S2D2),
DEF_MOD("rpc-if", 917, R8A77970_CLK_RPC),
DEF_MOD("i2c4", 927, R8A77970_CLK_S2D2), DEF_MOD("i2c4", 927, R8A77970_CLK_S2D2),
DEF_MOD("i2c3", 928, R8A77970_CLK_S2D2), DEF_MOD("i2c3", 928, R8A77970_CLK_S2D2),
DEF_MOD("i2c2", 929, R8A77970_CLK_S2D2), DEF_MOD("i2c2", 929, R8A77970_CLK_S2D2),
......
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