Commit 701cac61 authored by Al Viro's avatar Al Viro

CONFIG_ARCH_HAS_RAW_COPY_USER is unconditional now

all architectures converted
Signed-off-by: default avatarAl Viro <viro@zeniv.linux.org.uk>
parent eea86b63
...@@ -847,7 +847,4 @@ config STRICT_MODULE_RWX ...@@ -847,7 +847,4 @@ config STRICT_MODULE_RWX
config ARCH_WANT_RELAX_ORDER config ARCH_WANT_RELAX_ORDER
bool bool
config ARCH_HAS_RAW_COPY_USER
bool
source "kernel/gcov/Kconfig" source "kernel/gcov/Kconfig"
...@@ -26,7 +26,6 @@ config ALPHA ...@@ -26,7 +26,6 @@ config ALPHA
select ODD_RT_SIGACTION select ODD_RT_SIGACTION
select OLD_SIGSUSPEND select OLD_SIGSUSPEND
select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67 select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67
select ARCH_HAS_RAW_COPY_USER
help help
The Alpha is a 64-bit general-purpose processor designed and The Alpha is a 64-bit general-purpose processor designed and
marketed by the Digital Equipment Corporation of blessed memory, marketed by the Digital Equipment Corporation of blessed memory,
......
...@@ -44,7 +44,6 @@ config ARC ...@@ -44,7 +44,6 @@ config ARC
select HAVE_GENERIC_DMA_COHERENT select HAVE_GENERIC_DMA_COHERENT
select HAVE_KERNEL_GZIP select HAVE_KERNEL_GZIP
select HAVE_KERNEL_LZMA select HAVE_KERNEL_LZMA
select ARCH_HAS_RAW_COPY_USER
config MIGHT_HAVE_PCI config MIGHT_HAVE_PCI
bool bool
......
...@@ -96,7 +96,6 @@ config ARM ...@@ -96,7 +96,6 @@ config ARM
select PERF_USE_VMALLOC select PERF_USE_VMALLOC
select RTC_LIB select RTC_LIB
select SYS_SUPPORTS_APM_EMULATION select SYS_SUPPORTS_APM_EMULATION
select ARCH_HAS_RAW_COPY_USER
# Above selects are sorted alphabetically; please add new ones # Above selects are sorted alphabetically; please add new ones
# according to that. Thanks. # according to that. Thanks.
help help
......
...@@ -115,7 +115,6 @@ config ARM64 ...@@ -115,7 +115,6 @@ config ARM64
select SPARSE_IRQ select SPARSE_IRQ
select SYSCTL_EXCEPTION_TRACE select SYSCTL_EXCEPTION_TRACE
select THREAD_INFO_IN_TASK select THREAD_INFO_IN_TASK
select ARCH_HAS_RAW_COPY_USER
help help
ARM 64-bit (AArch64) Linux support. ARM 64-bit (AArch64) Linux support.
......
...@@ -19,7 +19,6 @@ config AVR32 ...@@ -19,7 +19,6 @@ config AVR32
select HAVE_MOD_ARCH_SPECIFIC select HAVE_MOD_ARCH_SPECIFIC
select MODULES_USE_ELF_RELA select MODULES_USE_ELF_RELA
select HAVE_NMI select HAVE_NMI
select ARCH_HAS_RAW_COPY_USER
help help
AVR32 is a high-performance 32-bit RISC microprocessor core, AVR32 is a high-performance 32-bit RISC microprocessor core,
designed for cost-sensitive embedded applications, with particular designed for cost-sensitive embedded applications, with particular
......
...@@ -41,7 +41,6 @@ config BLACKFIN ...@@ -41,7 +41,6 @@ config BLACKFIN
select MODULES_USE_ELF_RELA select MODULES_USE_ELF_RELA
select HAVE_DEBUG_STACKOVERFLOW select HAVE_DEBUG_STACKOVERFLOW
select HAVE_NMI select HAVE_NMI
select ARCH_HAS_RAW_COPY_USER
config GENERIC_CSUM config GENERIC_CSUM
def_bool y def_bool y
......
...@@ -18,7 +18,6 @@ config C6X ...@@ -18,7 +18,6 @@ config C6X
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select MODULES_USE_ELF_RELA select MODULES_USE_ELF_RELA
select ARCH_NO_COHERENT_DMA_MMAP select ARCH_NO_COHERENT_DMA_MMAP
select ARCH_HAS_RAW_COPY_USER
config MMU config MMU
def_bool n def_bool n
......
...@@ -71,7 +71,6 @@ config CRIS ...@@ -71,7 +71,6 @@ config CRIS
select GENERIC_SCHED_CLOCK if ETRAX_ARCH_V32 select GENERIC_SCHED_CLOCK if ETRAX_ARCH_V32
select HAVE_DEBUG_BUGVERBOSE if ETRAX_ARCH_V32 select HAVE_DEBUG_BUGVERBOSE if ETRAX_ARCH_V32
select HAVE_NMI select HAVE_NMI
select ARCH_HAS_RAW_COPY_USER
config HZ config HZ
int int
......
...@@ -16,7 +16,6 @@ config FRV ...@@ -16,7 +16,6 @@ config FRV
select OLD_SIGACTION select OLD_SIGACTION
select HAVE_DEBUG_STACKOVERFLOW select HAVE_DEBUG_STACKOVERFLOW
select ARCH_NO_COHERENT_DMA_MMAP select ARCH_NO_COHERENT_DMA_MMAP
select ARCH_HAS_RAW_COPY_USER
config ZONE_DMA config ZONE_DMA
bool bool
......
...@@ -22,7 +22,6 @@ config H8300 ...@@ -22,7 +22,6 @@ config H8300
select HAVE_ARCH_KGDB select HAVE_ARCH_KGDB
select HAVE_ARCH_HASH select HAVE_ARCH_HASH
select CPU_NO_EFFICIENT_FFS select CPU_NO_EFFICIENT_FFS
select ARCH_HAS_RAW_COPY_USER
config RWSEM_GENERIC_SPINLOCK config RWSEM_GENERIC_SPINLOCK
def_bool y def_bool y
......
...@@ -26,7 +26,6 @@ config HEXAGON ...@@ -26,7 +26,6 @@ config HEXAGON
select GENERIC_CLOCKEVENTS_BROADCAST select GENERIC_CLOCKEVENTS_BROADCAST
select MODULES_USE_ELF_RELA select MODULES_USE_ELF_RELA
select GENERIC_CPU_DEVICES select GENERIC_CPU_DEVICES
select ARCH_HAS_RAW_COPY_USER
---help--- ---help---
Qualcomm Hexagon is a processor architecture designed for high Qualcomm Hexagon is a processor architecture designed for high
performance and low power across a wide variety of applications. performance and low power across a wide variety of applications.
......
...@@ -53,7 +53,6 @@ config IA64 ...@@ -53,7 +53,6 @@ config IA64
select ARCH_USE_CMPXCHG_LOCKREF select ARCH_USE_CMPXCHG_LOCKREF
select HAVE_ARCH_AUDITSYSCALL select HAVE_ARCH_AUDITSYSCALL
select HAVE_ARCH_HARDENED_USERCOPY select HAVE_ARCH_HARDENED_USERCOPY
select ARCH_HAS_RAW_COPY_USER
default y default y
help help
The Itanium Processor Family is Intel's 64-bit successor to The Itanium Processor Family is Intel's 64-bit successor to
......
...@@ -19,7 +19,6 @@ config M32R ...@@ -19,7 +19,6 @@ config M32R
select HAVE_DEBUG_STACKOVERFLOW select HAVE_DEBUG_STACKOVERFLOW
select CPU_NO_EFFICIENT_FFS select CPU_NO_EFFICIENT_FFS
select DMA_NOOP_OPS select DMA_NOOP_OPS
select ARCH_HAS_RAW_COPY_USER
config SBUS config SBUS
bool bool
......
...@@ -22,7 +22,6 @@ config M68K ...@@ -22,7 +22,6 @@ config M68K
select MODULES_USE_ELF_RELA select MODULES_USE_ELF_RELA
select OLD_SIGSUSPEND3 select OLD_SIGSUSPEND3
select OLD_SIGACTION select OLD_SIGACTION
select ARCH_HAS_RAW_COPY_USER
config RWSEM_GENERIC_SPINLOCK config RWSEM_GENERIC_SPINLOCK
bool bool
......
config METAG config METAG
def_bool y def_bool y
select ARCH_HAS_RAW_COPY_USER
select EMBEDDED select EMBEDDED
select GENERIC_ATOMIC64 select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
......
...@@ -34,7 +34,6 @@ config MICROBLAZE ...@@ -34,7 +34,6 @@ config MICROBLAZE
select TRACING_SUPPORT select TRACING_SUPPORT
select VIRT_TO_BUS select VIRT_TO_BUS
select CPU_NO_EFFICIENT_FFS select CPU_NO_EFFICIENT_FFS
select ARCH_HAS_RAW_COPY_USER
config SWAP config SWAP
def_bool n def_bool n
......
...@@ -69,7 +69,6 @@ config MIPS ...@@ -69,7 +69,6 @@ config MIPS
select HAVE_EXIT_THREAD select HAVE_EXIT_THREAD
select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_ARCH_HARDENED_USERCOPY select HAVE_ARCH_HARDENED_USERCOPY
select ARCH_HAS_RAW_COPY_USER
menu "Machine selection" menu "Machine selection"
......
...@@ -16,7 +16,6 @@ config MN10300 ...@@ -16,7 +16,6 @@ config MN10300
select OLD_SIGACTION select OLD_SIGACTION
select HAVE_DEBUG_STACKOVERFLOW select HAVE_DEBUG_STACKOVERFLOW
select ARCH_NO_COHERENT_DMA_MMAP select ARCH_NO_COHERENT_DMA_MMAP
select ARCH_HAS_RAW_COPY_USER
config AM33_2 config AM33_2
def_bool n def_bool n
......
...@@ -16,7 +16,6 @@ config NIOS2 ...@@ -16,7 +16,6 @@ config NIOS2
select SPARSE_IRQ select SPARSE_IRQ
select USB_ARCH_HAS_HCD if USB_SUPPORT select USB_ARCH_HAS_HCD if USB_SUPPORT
select CPU_NO_EFFICIENT_FFS select CPU_NO_EFFICIENT_FFS
select ARCH_HAS_RAW_COPY_USER
config GENERIC_CSUM config GENERIC_CSUM
def_bool y def_bool y
......
...@@ -28,7 +28,6 @@ config OPENRISC ...@@ -28,7 +28,6 @@ config OPENRISC
select OR1K_PIC select OR1K_PIC
select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1 select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
select NO_BOOTMEM select NO_BOOTMEM
select ARCH_HAS_RAW_COPY_USER
config MMU config MMU
def_bool y def_bool y
......
...@@ -41,7 +41,6 @@ config PARISC ...@@ -41,7 +41,6 @@ config PARISC
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select ARCH_NO_COHERENT_DMA_MMAP select ARCH_NO_COHERENT_DMA_MMAP
select CPU_NO_EFFICIENT_FFS select CPU_NO_EFFICIENT_FFS
select ARCH_HAS_RAW_COPY_USER
help help
The PA-RISC microprocessor is designed by Hewlett-Packard and used The PA-RISC microprocessor is designed by Hewlett-Packard and used
......
...@@ -87,7 +87,6 @@ config PPC ...@@ -87,7 +87,6 @@ config PPC
select ARCH_HAS_DMA_SET_COHERENT_MASK select ARCH_HAS_DMA_SET_COHERENT_MASK
select ARCH_HAS_ELF_RANDOMIZE select ARCH_HAS_ELF_RANDOMIZE
select ARCH_HAS_GCOV_PROFILE_ALL select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_RAW_COPY_USER
select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE
select ARCH_HAS_SG_CHAIN select ARCH_HAS_SG_CHAIN
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
......
...@@ -178,7 +178,6 @@ config S390 ...@@ -178,7 +178,6 @@ config S390
select ARCH_HAS_SCALED_CPUTIME select ARCH_HAS_SCALED_CPUTIME
select VIRT_TO_BUS select VIRT_TO_BUS
select HAVE_NMI select HAVE_NMI
select ARCH_HAS_RAW_COPY_USER
config SCHED_OMIT_FRAME_POINTER config SCHED_OMIT_FRAME_POINTER
......
...@@ -15,7 +15,6 @@ config SCORE ...@@ -15,7 +15,6 @@ config SCORE
select MODULES_USE_ELF_REL select MODULES_USE_ELF_REL
select CLONE_BACKWARDS select CLONE_BACKWARDS
select CPU_NO_EFFICIENT_FFS select CPU_NO_EFFICIENT_FFS
select ARCH_HAS_RAW_COPY_USER
choice choice
prompt "System type" prompt "System type"
......
...@@ -48,7 +48,6 @@ config SUPERH ...@@ -48,7 +48,6 @@ config SUPERH
select HAVE_ARCH_AUDITSYSCALL select HAVE_ARCH_AUDITSYSCALL
select HAVE_FUTEX_CMPXCHG if FUTEX select HAVE_FUTEX_CMPXCHG if FUTEX
select HAVE_NMI select HAVE_NMI
select ARCH_HAS_RAW_COPY_USER
help help
The SuperH is a RISC processor targeted for use in embedded systems The SuperH is a RISC processor targeted for use in embedded systems
and consumer electronics; it was also used in the Sega Dreamcast and consumer electronics; it was also used in the Sega Dreamcast
......
...@@ -45,7 +45,6 @@ config SPARC ...@@ -45,7 +45,6 @@ config SPARC
select HAVE_ARCH_HARDENED_USERCOPY select HAVE_ARCH_HARDENED_USERCOPY
select PROVE_LOCKING_SMALL if PROVE_LOCKING select PROVE_LOCKING_SMALL if PROVE_LOCKING
select ARCH_WANT_RELAX_ORDER select ARCH_WANT_RELAX_ORDER
select ARCH_HAS_RAW_COPY_USER
config SPARC32 config SPARC32
def_bool !64BIT def_bool !64BIT
......
...@@ -33,7 +33,6 @@ config TILE ...@@ -33,7 +33,6 @@ config TILE
select USER_STACKTRACE_SUPPORT select USER_STACKTRACE_SUPPORT
select USE_PMC if PERF_EVENTS select USE_PMC if PERF_EVENTS
select VIRT_TO_BUS select VIRT_TO_BUS
select ARCH_HAS_RAW_COPY_USER
config MMU config MMU
def_bool y def_bool y
......
...@@ -13,7 +13,6 @@ config UML ...@@ -13,7 +13,6 @@ config UML
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select HAVE_GCC_PLUGINS select HAVE_GCC_PLUGINS
select TTY # Needed for line.c select TTY # Needed for line.c
select ARCH_HAS_RAW_COPY_USER
config MMU config MMU
bool bool
......
...@@ -18,7 +18,6 @@ config UNICORE32 ...@@ -18,7 +18,6 @@ config UNICORE32
select ARCH_WANT_FRAME_POINTERS select ARCH_WANT_FRAME_POINTERS
select GENERIC_IOMAP select GENERIC_IOMAP
select MODULES_USE_ELF_REL select MODULES_USE_ELF_REL
select ARCH_HAS_RAW_COPY_USER
help help
UniCore-32 is 32-bit Instruction Set Architecture, UniCore-32 is 32-bit Instruction Set Architecture,
including a series of low-power-consumption RISC chip including a series of low-power-consumption RISC chip
......
...@@ -175,7 +175,6 @@ config X86 ...@@ -175,7 +175,6 @@ config X86
select USER_STACKTRACE_SUPPORT select USER_STACKTRACE_SUPPORT
select VIRT_TO_BUS select VIRT_TO_BUS
select X86_FEATURE_NAMES if PROC_FS select X86_FEATURE_NAMES if PROC_FS
select ARCH_HAS_RAW_COPY_USER
config INSTRUCTION_DECODER config INSTRUCTION_DECODER
def_bool y def_bool y
......
...@@ -29,7 +29,6 @@ config XTENSA ...@@ -29,7 +29,6 @@ config XTENSA
select NO_BOOTMEM select NO_BOOTMEM
select PERF_USE_VMALLOC select PERF_USE_VMALLOC
select VIRT_TO_BUS select VIRT_TO_BUS
select ARCH_HAS_RAW_COPY_USER
help help
Xtensa processors are 32-bit RISC machines designed by Tensilica Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both primarily for embedded systems. These processors are both
......
...@@ -86,11 +86,7 @@ static inline int __access_ok(unsigned long addr, unsigned long size) ...@@ -86,11 +86,7 @@ static inline int __access_ok(unsigned long addr, unsigned long size)
static inline int __put_user_fn(size_t size, void __user *ptr, void *x) static inline int __put_user_fn(size_t size, void __user *ptr, void *x)
{ {
#ifdef CONFIG_ARCH_HAS_RAW_COPY_USER
return unlikely(raw_copy_to_user(ptr, x, size)) ? -EFAULT : 0; return unlikely(raw_copy_to_user(ptr, x, size)) ? -EFAULT : 0;
#else
return unlikely(__copy_to_user(ptr, x, size)) ? -EFAULT : 0;
#endif
} }
#define __put_user_fn(sz, u, k) __put_user_fn(sz, u, k) #define __put_user_fn(sz, u, k) __put_user_fn(sz, u, k)
...@@ -151,11 +147,7 @@ extern int __put_user_bad(void) __attribute__((noreturn)); ...@@ -151,11 +147,7 @@ extern int __put_user_bad(void) __attribute__((noreturn));
#ifndef __get_user_fn #ifndef __get_user_fn
static inline int __get_user_fn(size_t size, const void __user *ptr, void *x) static inline int __get_user_fn(size_t size, const void __user *ptr, void *x)
{ {
#ifdef CONFIG_ARCH_HAS_RAW_COPY_USER
return unlikely(raw_copy_from_user(x, ptr, size)) ? -EFAULT : 0; return unlikely(raw_copy_from_user(x, ptr, size)) ? -EFAULT : 0;
#else
return unlikely(__copy_from_user(x, ptr, size)) ? -EFAULT : 0;
#endif
} }
#define __get_user_fn(sz, u, k) __get_user_fn(sz, u, k) #define __get_user_fn(sz, u, k) __get_user_fn(sz, u, k)
...@@ -164,39 +156,6 @@ static inline int __get_user_fn(size_t size, const void __user *ptr, void *x) ...@@ -164,39 +156,6 @@ static inline int __get_user_fn(size_t size, const void __user *ptr, void *x)
extern int __get_user_bad(void) __attribute__((noreturn)); extern int __get_user_bad(void) __attribute__((noreturn));
#ifndef CONFIG_ARCH_HAS_RAW_COPY_USER
#ifndef __copy_from_user_inatomic
#define __copy_from_user_inatomic __copy_from_user
#endif
#ifndef __copy_to_user_inatomic
#define __copy_to_user_inatomic __copy_to_user
#endif
static inline long copy_from_user(void *to,
const void __user * from, unsigned long n)
{
unsigned long res = n;
might_fault();
if (likely(access_ok(VERIFY_READ, from, n)))
res = __copy_from_user(to, from, n);
if (unlikely(res))
memset(to + (n - res), 0, res);
return res;
}
static inline long copy_to_user(void __user *to,
const void *from, unsigned long n)
{
might_fault();
if (access_ok(VERIFY_WRITE, to, n))
return __copy_to_user(to, from, n);
else
return n;
}
#endif
/* /*
* Copy a null terminated string from userspace. * Copy a null terminated string from userspace.
*/ */
......
...@@ -12,12 +12,10 @@ ...@@ -12,12 +12,10 @@
#include <asm/uaccess.h> #include <asm/uaccess.h>
#ifdef CONFIG_ARCH_HAS_RAW_COPY_USER
/* /*
* Architectures should provide two primitives (raw_copy_{to,from}_user()) * Architectures should provide two primitives (raw_copy_{to,from}_user())
* select ARCH_HAS_RAW_COPY_FROM_USER and get rid of their private instances * and get rid of their private instances of copy_{to,from}_user() and
* of copy_{to,from}_user() and __copy_{to,from}_user{,_inatomic}(). Once * __copy_{to,from}_user{,_inatomic}().
* all of them switch, this part of linux/uaccess.h will become unconditional.
* *
* raw_copy_{to,from}_user(to, from, size) should copy up to size bytes and * raw_copy_{to,from}_user(to, from, size) should copy up to size bytes and
* return the amount left to copy. They should assume that access_ok() has * return the amount left to copy. They should assume that access_ok() has
...@@ -196,7 +194,6 @@ copy_in_user(void __user *to, const void *from, unsigned long n) ...@@ -196,7 +194,6 @@ copy_in_user(void __user *to, const void *from, unsigned long n)
return n; return n;
} }
#endif #endif
#endif
static __always_inline void pagefault_disabled_inc(void) static __always_inline void pagefault_disabled_inc(void)
{ {
......
...@@ -41,7 +41,7 @@ obj-y += bcd.o div64.o sort.o parser.o debug_locks.o random32.o \ ...@@ -41,7 +41,7 @@ obj-y += bcd.o div64.o sort.o parser.o debug_locks.o random32.o \
gcd.o lcm.o list_sort.o uuid.o flex_array.o iov_iter.o clz_ctz.o \ gcd.o lcm.o list_sort.o uuid.o flex_array.o iov_iter.o clz_ctz.o \
bsearch.o find_bit.o llist.o memweight.o kfifo.o \ bsearch.o find_bit.o llist.o memweight.o kfifo.o \
percpu-refcount.o percpu_ida.o rhashtable.o reciprocal_div.o \ percpu-refcount.o percpu_ida.o rhashtable.o reciprocal_div.o \
once.o refcount.o once.o refcount.o usercopy.o
obj-y += string_helpers.o obj-y += string_helpers.o
obj-$(CONFIG_TEST_STRING_HELPERS) += test-string_helpers.o obj-$(CONFIG_TEST_STRING_HELPERS) += test-string_helpers.o
obj-y += hexdump.o obj-y += hexdump.o
...@@ -242,5 +242,3 @@ UBSAN_SANITIZE_ubsan.o := n ...@@ -242,5 +242,3 @@ UBSAN_SANITIZE_ubsan.o := n
obj-$(CONFIG_SBITMAP) += sbitmap.o obj-$(CONFIG_SBITMAP) += sbitmap.o
obj-$(CONFIG_PARMAN) += parman.o obj-$(CONFIG_PARMAN) += parman.o
obj-$(CONFIG_ARCH_HAS_RAW_COPY_USER) += usercopy.o
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