Commit 70c4b0fb authored by Thierry Reding's avatar Thierry Reding Committed by Greg Kroah-Hartman

arm64: tegra: I2C on Tegra194 is not compatible with Tegra114

[ Upstream commit d9fd2244 ]

Tegra194 contains a version of the I2C controller that is no longer
compatible with the version found in Tegra114.
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent e821b710
...@@ -118,7 +118,7 @@ uartf: serial@3150000 { ...@@ -118,7 +118,7 @@ uartf: serial@3150000 {
}; };
gen1_i2c: i2c@3160000 { gen1_i2c: i2c@3160000 {
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra194-i2c";
reg = <0x03160000 0x10000>; reg = <0x03160000 0x10000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
...@@ -143,7 +143,7 @@ uarth: serial@3170000 { ...@@ -143,7 +143,7 @@ uarth: serial@3170000 {
}; };
cam_i2c: i2c@3180000 { cam_i2c: i2c@3180000 {
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra194-i2c";
reg = <0x03180000 0x10000>; reg = <0x03180000 0x10000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
...@@ -157,7 +157,7 @@ cam_i2c: i2c@3180000 { ...@@ -157,7 +157,7 @@ cam_i2c: i2c@3180000 {
/* shares pads with dpaux1 */ /* shares pads with dpaux1 */
dp_aux_ch1_i2c: i2c@3190000 { dp_aux_ch1_i2c: i2c@3190000 {
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra194-i2c";
reg = <0x03190000 0x10000>; reg = <0x03190000 0x10000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
...@@ -171,7 +171,7 @@ dp_aux_ch1_i2c: i2c@3190000 { ...@@ -171,7 +171,7 @@ dp_aux_ch1_i2c: i2c@3190000 {
/* shares pads with dpaux0 */ /* shares pads with dpaux0 */
dp_aux_ch0_i2c: i2c@31b0000 { dp_aux_ch0_i2c: i2c@31b0000 {
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra194-i2c";
reg = <0x031b0000 0x10000>; reg = <0x031b0000 0x10000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
...@@ -184,7 +184,7 @@ dp_aux_ch0_i2c: i2c@31b0000 { ...@@ -184,7 +184,7 @@ dp_aux_ch0_i2c: i2c@31b0000 {
}; };
gen7_i2c: i2c@31c0000 { gen7_i2c: i2c@31c0000 {
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra194-i2c";
reg = <0x031c0000 0x10000>; reg = <0x031c0000 0x10000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
...@@ -197,7 +197,7 @@ gen7_i2c: i2c@31c0000 { ...@@ -197,7 +197,7 @@ gen7_i2c: i2c@31c0000 {
}; };
gen9_i2c: i2c@31e0000 { gen9_i2c: i2c@31e0000 {
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra194-i2c";
reg = <0x031e0000 0x10000>; reg = <0x031e0000 0x10000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
...@@ -264,7 +264,7 @@ hsp_top0: hsp@3c00000 { ...@@ -264,7 +264,7 @@ hsp_top0: hsp@3c00000 {
}; };
gen2_i2c: i2c@c240000 { gen2_i2c: i2c@c240000 {
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra194-i2c";
reg = <0x0c240000 0x10000>; reg = <0x0c240000 0x10000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
...@@ -277,7 +277,7 @@ gen2_i2c: i2c@c240000 { ...@@ -277,7 +277,7 @@ gen2_i2c: i2c@c240000 {
}; };
gen8_i2c: i2c@c250000 { gen8_i2c: i2c@c250000 {
compatible = "nvidia,tegra194-i2c", "nvidia,tegra114-i2c"; compatible = "nvidia,tegra194-i2c";
reg = <0x0c250000 0x10000>; reg = <0x0c250000 0x10000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>; #address-cells = <1>;
......
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