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Commit 70c6420c authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'renesas-dt-for-v4.11' of... 

Merge tag 'renesas-dt-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.11

* Add da9063 PMIC device node for system restart to gose board
* Add device node for PRR to SoCs where it was missing
* Move RST node before SYSC node where it was incorrectly placed
* Use Gen 2 fallback bindings for I2C, IIC, MSIOf and USB2 phy
* Use SoC-specific compat string for MMCIF where it was missing

* tag 'renesas-dt-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (25 commits)
  ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for msiof nodes
  ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for msiof nodes
  ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for msiof nodes
  ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for iic nodes
  ARM: dts: r8a7793: Use R-Car Gen 2 fallback binding for iic nodes
  ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for iic nodes
  ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for iic nodes
  ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for i2c nodes
  ARM: dts: r8a7793: Use R-Car Gen 2 fallback binding for i2c nodes
  ARM: dts: r8a7792: Use R-Car Gen 2 fallback binding for i2c nodes
  ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for i2c nodes
  ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for i2c nodes
  ARM: dts: r8a7778: Use R-Car Gen 1 fallback binding for i2c nodes
  ARM: dts: r8a7779: Use R-Car Gen 1 fallback binding for i2c nodes
  ARM: dts: r8a7794: Use renesas,rcar-gen2-usb-phy fallback binding
  ARM: dts: r8a7791: Use renesas,rcar-gen2-usb-phy fallback binding
  ARM: dts: r8a7790: Use renesas,rcar-gen2-usb-phy fallback binding
  ARM: dts: gose: Add da9063 PMIC device node for system restart
  ARM: dts: sh73a0: Use SoC-specific compat string for mmcif
  ARM: dts: r8a7778: Use SoC-specific compat string for mmcif
  ...
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents a121103c 654450ba
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Showing with 133 additions and 72 deletions
arch/arm/boot/dts/r8a73a4.dtsi
View file @ 70c6420c
...@@ -440,7 +440,7 @@ sdhi2: sd@ee140000 { ...@@ -440,7 +440,7 @@ sdhi2: sd@ee140000 {
}; };
mmcif0: mmc@ee200000 { mmcif0: mmc@ee200000 {
compatible = "renesas,sh-mmcif"; compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>; reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A73A4_CLK_MMCIF0>; clocks = <&mstp3_clks R8A73A4_CLK_MMCIF0>;
...@@ -450,7 +450,7 @@ mmcif0: mmc@ee200000 { ...@@ -450,7 +450,7 @@ mmcif0: mmc@ee200000 {
}; };
mmcif1: mmc@ee220000 { mmcif1: mmc@ee220000 {
compatible = "renesas,sh-mmcif"; compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
reg = <0 0xee220000 0 0x80>; reg = <0 0xee220000 0 0x80>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A73A4_CLK_MMCIF1>; clocks = <&mstp3_clks R8A73A4_CLK_MMCIF1>;
......
arch/arm/boot/dts/r8a7743.dtsi
View file @ 70c6420c
...@@ -102,10 +102,9 @@ cpg: clock-controller@e6150000 { ...@@ -102,10 +102,9 @@ cpg: clock-controller@e6150000 {
#power-domain-cells = <0>; #power-domain-cells = <0>;
}; };
sysc: system-controller@e6180000 { prr: chipid@ff000044 {
compatible = "renesas,r8a7743-sysc"; compatible = "renesas,prr";
reg = <0 0xe6180000 0 0x200>; reg = <0 0xff000044 0 4>;
#power-domain-cells = <1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
...@@ -113,6 +112,12 @@ rst: reset-controller@e6160000 { ...@@ -113,6 +112,12 @@ rst: reset-controller@e6160000 {
reg = <0 0xe6160000 0 0x100>; reg = <0 0xe6160000 0 0x100>;
}; };
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7743-sysc";
reg = <0 0xe6180000 0 0x200>;
#power-domain-cells = <1>;
};
dmac0: dma-controller@e6700000 { dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7743", compatible = "renesas,dmac-r8a7743",
"renesas,rcar-dmac"; "renesas,rcar-dmac";
......
arch/arm/boot/dts/r8a7745.dtsi
View file @ 70c6420c
...@@ -102,10 +102,9 @@ cpg: clock-controller@e6150000 { ...@@ -102,10 +102,9 @@ cpg: clock-controller@e6150000 {
#power-domain-cells = <0>; #power-domain-cells = <0>;
}; };
sysc: system-controller@e6180000 { prr: chipid@ff000044 {
compatible = "renesas,r8a7745-sysc"; compatible = "renesas,prr";
reg = <0 0xe6180000 0 0x200>; reg = <0 0xff000044 0 4>;
#power-domain-cells = <1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
...@@ -113,6 +112,12 @@ rst: reset-controller@e6160000 { ...@@ -113,6 +112,12 @@ rst: reset-controller@e6160000 {
reg = <0 0xe6160000 0 0x100>; reg = <0 0xe6160000 0 0x100>;
}; };
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7745-sysc";
reg = <0 0xe6180000 0 0x200>;
#power-domain-cells = <1>;
};
dmac0: dma-controller@e6700000 { dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7745", compatible = "renesas,dmac-r8a7745",
"renesas,rcar-dmac"; "renesas,rcar-dmac";
......
arch/arm/boot/dts/r8a7778.dtsi
View file @ 70c6420c
...@@ -150,7 +150,7 @@ pfc: pfc@fffc0000 { ...@@ -150,7 +150,7 @@ pfc: pfc@fffc0000 {
i2c0: i2c@ffc70000 { i2c0: i2c@ffc70000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7778"; compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
reg = <0xffc70000 0x1000>; reg = <0xffc70000 0x1000>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_I2C0>; clocks = <&mstp0_clks R8A7778_CLK_I2C0>;
...@@ -161,7 +161,7 @@ i2c0: i2c@ffc70000 { ...@@ -161,7 +161,7 @@ i2c0: i2c@ffc70000 {
i2c1: i2c@ffc71000 { i2c1: i2c@ffc71000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7778"; compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
reg = <0xffc71000 0x1000>; reg = <0xffc71000 0x1000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_I2C1>; clocks = <&mstp0_clks R8A7778_CLK_I2C1>;
...@@ -172,7 +172,7 @@ i2c1: i2c@ffc71000 { ...@@ -172,7 +172,7 @@ i2c1: i2c@ffc71000 {
i2c2: i2c@ffc72000 { i2c2: i2c@ffc72000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7778"; compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
reg = <0xffc72000 0x1000>; reg = <0xffc72000 0x1000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_I2C2>; clocks = <&mstp0_clks R8A7778_CLK_I2C2>;
...@@ -183,7 +183,7 @@ i2c2: i2c@ffc72000 { ...@@ -183,7 +183,7 @@ i2c2: i2c@ffc72000 {
i2c3: i2c@ffc73000 { i2c3: i2c@ffc73000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7778"; compatible = "renesas,i2c-r8a7778", "renesas,rcar-gen1-i2c";
reg = <0xffc73000 0x1000>; reg = <0xffc73000 0x1000>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7778_CLK_I2C3>; clocks = <&mstp0_clks R8A7778_CLK_I2C3>;
...@@ -369,7 +369,7 @@ scif5: serial@ffe45000 { ...@@ -369,7 +369,7 @@ scif5: serial@ffe45000 {
}; };
mmcif: mmc@ffe4e000 { mmcif: mmc@ffe4e000 {
compatible = "renesas,sh-mmcif"; compatible = "renesas,mmcif-r8a7778", "renesas,sh-mmcif";
reg = <0xffe4e000 0x100>; reg = <0xffe4e000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7778_CLK_MMC>; clocks = <&mstp3_clks R8A7778_CLK_MMC>;
......
arch/arm/boot/dts/r8a7779.dtsi
View file @ 70c6420c
...@@ -173,7 +173,7 @@ GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH ...@@ -173,7 +173,7 @@ GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH
i2c0: i2c@ffc70000 { i2c0: i2c@ffc70000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7779"; compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
reg = <0xffc70000 0x1000>; reg = <0xffc70000 0x1000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_I2C0>; clocks = <&mstp0_clks R8A7779_CLK_I2C0>;
...@@ -184,7 +184,7 @@ i2c0: i2c@ffc70000 { ...@@ -184,7 +184,7 @@ i2c0: i2c@ffc70000 {
i2c1: i2c@ffc71000 { i2c1: i2c@ffc71000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7779"; compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
reg = <0xffc71000 0x1000>; reg = <0xffc71000 0x1000>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_I2C1>; clocks = <&mstp0_clks R8A7779_CLK_I2C1>;
...@@ -195,7 +195,7 @@ i2c1: i2c@ffc71000 { ...@@ -195,7 +195,7 @@ i2c1: i2c@ffc71000 {
i2c2: i2c@ffc72000 { i2c2: i2c@ffc72000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7779"; compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
reg = <0xffc72000 0x1000>; reg = <0xffc72000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_I2C2>; clocks = <&mstp0_clks R8A7779_CLK_I2C2>;
...@@ -206,7 +206,7 @@ i2c2: i2c@ffc72000 { ...@@ -206,7 +206,7 @@ i2c2: i2c@ffc72000 {
i2c3: i2c@ffc73000 { i2c3: i2c@ffc73000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7779"; compatible = "renesas,i2c-r8a7779", "renesas,rcar-gen1-i2c";
reg = <0xffc73000 0x1000>; reg = <0xffc73000 0x1000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7779_CLK_I2C3>; clocks = <&mstp0_clks R8A7779_CLK_I2C3>;
......
arch/arm/boot/dts/r8a7790.dtsi
View file @ 70c6420c
...@@ -480,7 +480,7 @@ usb_dmac1: dma-controller@e65b0000 { ...@@ -480,7 +480,7 @@ usb_dmac1: dma-controller@e65b0000 {
i2c0: i2c@e6508000 { i2c0: i2c@e6508000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7790"; compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7790_CLK_I2C0>; clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
...@@ -492,7 +492,7 @@ i2c0: i2c@e6508000 { ...@@ -492,7 +492,7 @@ i2c0: i2c@e6508000 {
i2c1: i2c@e6518000 { i2c1: i2c@e6518000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7790"; compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>; reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7790_CLK_I2C1>; clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
...@@ -504,7 +504,7 @@ i2c1: i2c@e6518000 { ...@@ -504,7 +504,7 @@ i2c1: i2c@e6518000 {
i2c2: i2c@e6530000 { i2c2: i2c@e6530000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7790"; compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>; reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7790_CLK_I2C2>; clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
...@@ -516,7 +516,7 @@ i2c2: i2c@e6530000 { ...@@ -516,7 +516,7 @@ i2c2: i2c@e6530000 {
i2c3: i2c@e6540000 { i2c3: i2c@e6540000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7790"; compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>; reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7790_CLK_I2C3>; clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
...@@ -528,7 +528,8 @@ i2c3: i2c@e6540000 { ...@@ -528,7 +528,8 @@ i2c3: i2c@e6540000 {
iic0: i2c@e6500000 { iic0: i2c@e6500000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>; reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC0>; clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
...@@ -542,7 +543,8 @@ iic0: i2c@e6500000 { ...@@ -542,7 +543,8 @@ iic0: i2c@e6500000 {
iic1: i2c@e6510000 { iic1: i2c@e6510000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>; reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC1>; clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
...@@ -556,7 +558,8 @@ iic1: i2c@e6510000 { ...@@ -556,7 +558,8 @@ iic1: i2c@e6510000 {
iic2: i2c@e6520000 { iic2: i2c@e6520000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6520000 0 0x425>; reg = <0 0xe6520000 0 0x425>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7790_CLK_IIC2>; clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
...@@ -570,7 +573,8 @@ iic2: i2c@e6520000 { ...@@ -570,7 +573,8 @@ iic2: i2c@e6520000 {
iic3: i2c@e60b0000 { iic3: i2c@e60b0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>; reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
...@@ -883,7 +887,8 @@ hsusb: usb@e6590000 { ...@@ -883,7 +887,8 @@ hsusb: usb@e6590000 {
}; };
usbphy: usb-phy@e6590100 { usbphy: usb-phy@e6590100 {
compatible = "renesas,usb-phy-r8a7790"; compatible = "renesas,usb-phy-r8a7790",
"renesas,rcar-gen2-usb-phy";
reg = <0 0xe6590100 0 0x100>; reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -1503,7 +1508,8 @@ qspi: spi@e6b10000 { ...@@ -1503,7 +1508,8 @@ qspi: spi@e6b10000 {
}; };
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>; reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
...@@ -1517,7 +1523,8 @@ msiof0: spi@e6e20000 { ...@@ -1517,7 +1523,8 @@ msiof0: spi@e6e20000 {
}; };
msiof1: spi@e6e10000 { msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>; reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
...@@ -1531,7 +1538,8 @@ msiof1: spi@e6e10000 { ...@@ -1531,7 +1538,8 @@ msiof1: spi@e6e10000 {
}; };
msiof2: spi@e6e00000 { msiof2: spi@e6e00000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>; reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
...@@ -1545,7 +1553,8 @@ msiof2: spi@e6e00000 { ...@@ -1545,7 +1553,8 @@ msiof2: spi@e6e00000 {
}; };
msiof3: spi@e6c90000 { msiof3: spi@e6c90000 {
compatible = "renesas,msiof-r8a7790"; compatible = "renesas,msiof-r8a7790",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6c90000 0 0x0064>; reg = <0 0xe6c90000 0 0x0064>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
......
arch/arm/boot/dts/r8a7791.dtsi
View file @ 70c6420c
...@@ -444,7 +444,7 @@ usb_dmac1: dma-controller@e65b0000 { ...@@ -444,7 +444,7 @@ usb_dmac1: dma-controller@e65b0000 {
i2c0: i2c@e6508000 { i2c0: i2c@e6508000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791"; compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C0>; clocks = <&mstp9_clks R8A7791_CLK_I2C0>;
...@@ -456,7 +456,7 @@ i2c0: i2c@e6508000 { ...@@ -456,7 +456,7 @@ i2c0: i2c@e6508000 {
i2c1: i2c@e6518000 { i2c1: i2c@e6518000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791"; compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>; reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C1>; clocks = <&mstp9_clks R8A7791_CLK_I2C1>;
...@@ -468,7 +468,7 @@ i2c1: i2c@e6518000 { ...@@ -468,7 +468,7 @@ i2c1: i2c@e6518000 {
i2c2: i2c@e6530000 { i2c2: i2c@e6530000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791"; compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>; reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C2>; clocks = <&mstp9_clks R8A7791_CLK_I2C2>;
...@@ -480,7 +480,7 @@ i2c2: i2c@e6530000 { ...@@ -480,7 +480,7 @@ i2c2: i2c@e6530000 {
i2c3: i2c@e6540000 { i2c3: i2c@e6540000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791"; compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>; reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C3>; clocks = <&mstp9_clks R8A7791_CLK_I2C3>;
...@@ -492,7 +492,7 @@ i2c3: i2c@e6540000 { ...@@ -492,7 +492,7 @@ i2c3: i2c@e6540000 {
i2c4: i2c@e6520000 { i2c4: i2c@e6520000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791"; compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>; reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C4>; clocks = <&mstp9_clks R8A7791_CLK_I2C4>;
...@@ -505,7 +505,7 @@ i2c5: i2c@e6528000 { ...@@ -505,7 +505,7 @@ i2c5: i2c@e6528000 {
/* doesn't need pinmux */ /* doesn't need pinmux */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7791"; compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>; reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_I2C5>; clocks = <&mstp9_clks R8A7791_CLK_I2C5>;
...@@ -518,7 +518,8 @@ i2c6: i2c@e60b0000 { ...@@ -518,7 +518,8 @@ i2c6: i2c@e60b0000 {
/* doesn't need pinmux */ /* doesn't need pinmux */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>; reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>; clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
...@@ -532,7 +533,8 @@ i2c6: i2c@e60b0000 { ...@@ -532,7 +533,8 @@ i2c6: i2c@e60b0000 {
i2c7: i2c@e6500000 { i2c7: i2c@e6500000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>; reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_IIC0>; clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
...@@ -546,7 +548,8 @@ i2c7: i2c@e6500000 { ...@@ -546,7 +548,8 @@ i2c7: i2c@e6500000 {
i2c8: i2c@e6510000 { i2c8: i2c@e6510000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>; reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7791_CLK_IIC1>; clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
...@@ -934,7 +937,8 @@ hsusb: usb@e6590000 { ...@@ -934,7 +937,8 @@ hsusb: usb@e6590000 {
}; };
usbphy: usb-phy@e6590100 { usbphy: usb-phy@e6590100 {
compatible = "renesas,usb-phy-r8a7791"; compatible = "renesas,usb-phy-r8a7791",
"renesas,rcar-gen2-usb-phy";
reg = <0 0xe6590100 0 0x100>; reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -1517,7 +1521,8 @@ qspi: spi@e6b10000 { ...@@ -1517,7 +1521,8 @@ qspi: spi@e6b10000 {
}; };
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7791"; compatible = "renesas,msiof-r8a7791",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>; reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
...@@ -1531,7 +1536,8 @@ msiof0: spi@e6e20000 { ...@@ -1531,7 +1536,8 @@ msiof0: spi@e6e20000 {
}; };
msiof1: spi@e6e10000 { msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7791"; compatible = "renesas,msiof-r8a7791",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>; reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>; clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
...@@ -1545,7 +1551,8 @@ msiof1: spi@e6e10000 { ...@@ -1545,7 +1551,8 @@ msiof1: spi@e6e10000 {
}; };
msiof2: spi@e6e00000 { msiof2: spi@e6e00000 {
compatible = "renesas,msiof-r8a7791"; compatible = "renesas,msiof-r8a7791",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>; reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>; clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
......
arch/arm/boot/dts/r8a7792.dtsi
View file @ 70c6420c
...@@ -498,7 +498,8 @@ avb: ethernet@e6800000 { ...@@ -498,7 +498,8 @@ avb: ethernet@e6800000 {
/* I2C doesn't need pinmux */ /* I2C doesn't need pinmux */
i2c0: i2c@e6508000 { i2c0: i2c@e6508000 {
compatible = "renesas,i2c-r8a7792"; compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C0>; clocks = <&mstp9_clks R8A7792_CLK_I2C0>;
...@@ -510,7 +511,8 @@ i2c0: i2c@e6508000 { ...@@ -510,7 +511,8 @@ i2c0: i2c@e6508000 {
}; };
i2c1: i2c@e6518000 { i2c1: i2c@e6518000 {
compatible = "renesas,i2c-r8a7792"; compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>; reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C1>; clocks = <&mstp9_clks R8A7792_CLK_I2C1>;
...@@ -522,7 +524,8 @@ i2c1: i2c@e6518000 { ...@@ -522,7 +524,8 @@ i2c1: i2c@e6518000 {
}; };
i2c2: i2c@e6530000 { i2c2: i2c@e6530000 {
compatible = "renesas,i2c-r8a7792"; compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>; reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C2>; clocks = <&mstp9_clks R8A7792_CLK_I2C2>;
...@@ -534,7 +537,8 @@ i2c2: i2c@e6530000 { ...@@ -534,7 +537,8 @@ i2c2: i2c@e6530000 {
}; };
i2c3: i2c@e6540000 { i2c3: i2c@e6540000 {
compatible = "renesas,i2c-r8a7792"; compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>; reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C3>; clocks = <&mstp9_clks R8A7792_CLK_I2C3>;
...@@ -546,7 +550,8 @@ i2c3: i2c@e6540000 { ...@@ -546,7 +550,8 @@ i2c3: i2c@e6540000 {
}; };
i2c4: i2c@e6520000 { i2c4: i2c@e6520000 {
compatible = "renesas,i2c-r8a7792"; compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>; reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C4>; clocks = <&mstp9_clks R8A7792_CLK_I2C4>;
...@@ -558,7 +563,8 @@ i2c4: i2c@e6520000 { ...@@ -558,7 +563,8 @@ i2c4: i2c@e6520000 {
}; };
i2c5: i2c@e6528000 { i2c5: i2c@e6528000 {
compatible = "renesas,i2c-r8a7792"; compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>; reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7792_CLK_I2C5>; clocks = <&mstp9_clks R8A7792_CLK_I2C5>;
...@@ -585,7 +591,8 @@ qspi: spi@e6b10000 { ...@@ -585,7 +591,8 @@ qspi: spi@e6b10000 {
}; };
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7792"; compatible = "renesas,msiof-r8a7792",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>; reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>; clocks = <&mstp0_clks R8A7792_CLK_MSIOF0>;
...@@ -599,7 +606,8 @@ msiof0: spi@e6e20000 { ...@@ -599,7 +606,8 @@ msiof0: spi@e6e20000 {
}; };
msiof1: spi@e6e10000 { msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7792"; compatible = "renesas,msiof-r8a7792",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>; reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>; clocks = <&mstp2_clks R8A7792_CLK_MSIOF1>;
......
arch/arm/boot/dts/r8a7793-gose.dts
View file @ 70c6420c
...@@ -538,6 +538,27 @@ eeprom@50 { ...@@ -538,6 +538,27 @@ eeprom@50 {
}; };
}; };
&i2c6 {
status = "okay";
clock-frequency = <100000>;
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
wdt {
compatible = "dlg,da9063-watchdog";
};
};
};
&rcar_sound { &rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>; pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
arch/arm/boot/dts/r8a7793.dtsi
View file @ 70c6420c
...@@ -411,7 +411,7 @@ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH ...@@ -411,7 +411,7 @@ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
i2c0: i2c@e6508000 { i2c0: i2c@e6508000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7793"; compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C0>; clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
...@@ -423,7 +423,7 @@ i2c0: i2c@e6508000 { ...@@ -423,7 +423,7 @@ i2c0: i2c@e6508000 {
i2c1: i2c@e6518000 { i2c1: i2c@e6518000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7793"; compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>; reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C1>; clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
...@@ -435,7 +435,7 @@ i2c1: i2c@e6518000 { ...@@ -435,7 +435,7 @@ i2c1: i2c@e6518000 {
i2c2: i2c@e6530000 { i2c2: i2c@e6530000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7793"; compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>; reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C2>; clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
...@@ -447,7 +447,7 @@ i2c2: i2c@e6530000 { ...@@ -447,7 +447,7 @@ i2c2: i2c@e6530000 {
i2c3: i2c@e6540000 { i2c3: i2c@e6540000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7793"; compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>; reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C3>; clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
...@@ -459,7 +459,7 @@ i2c3: i2c@e6540000 { ...@@ -459,7 +459,7 @@ i2c3: i2c@e6540000 {
i2c4: i2c@e6520000 { i2c4: i2c@e6520000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7793"; compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>; reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C4>; clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
...@@ -472,7 +472,7 @@ i2c5: i2c@e6528000 { ...@@ -472,7 +472,7 @@ i2c5: i2c@e6528000 {
/* doesn't need pinmux */ /* doesn't need pinmux */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7793"; compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>; reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_I2C5>; clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
...@@ -485,7 +485,8 @@ i2c6: i2c@e60b0000 { ...@@ -485,7 +485,8 @@ i2c6: i2c@e60b0000 {
/* doesn't need pinmux */ /* doesn't need pinmux */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe60b0000 0 0x425>; reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>; clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
...@@ -499,7 +500,8 @@ i2c6: i2c@e60b0000 { ...@@ -499,7 +500,8 @@ i2c6: i2c@e60b0000 {
i2c7: i2c@e6500000 { i2c7: i2c@e6500000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>; reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_IIC0>; clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
...@@ -513,7 +515,8 @@ i2c7: i2c@e6500000 { ...@@ -513,7 +515,8 @@ i2c7: i2c@e6500000 {
i2c8: i2c@e6510000 { i2c8: i2c@e6510000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>; reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7793_CLK_IIC1>; clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
......
arch/arm/boot/dts/r8a7794.dtsi
View file @ 70c6420c
...@@ -611,7 +611,7 @@ avb: ethernet@e6800000 { ...@@ -611,7 +611,7 @@ avb: ethernet@e6800000 {
/* The memory map in the User's Manual maps the cores to bus numbers */ /* The memory map in the User's Manual maps the cores to bus numbers */
i2c0: i2c@e6508000 { i2c0: i2c@e6508000 {
compatible = "renesas,i2c-r8a7794"; compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C0>; clocks = <&mstp9_clks R8A7794_CLK_I2C0>;
...@@ -623,7 +623,7 @@ i2c0: i2c@e6508000 { ...@@ -623,7 +623,7 @@ i2c0: i2c@e6508000 {
}; };
i2c1: i2c@e6518000 { i2c1: i2c@e6518000 {
compatible = "renesas,i2c-r8a7794"; compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>; reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C1>; clocks = <&mstp9_clks R8A7794_CLK_I2C1>;
...@@ -635,7 +635,7 @@ i2c1: i2c@e6518000 { ...@@ -635,7 +635,7 @@ i2c1: i2c@e6518000 {
}; };
i2c2: i2c@e6530000 { i2c2: i2c@e6530000 {
compatible = "renesas,i2c-r8a7794"; compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>; reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C2>; clocks = <&mstp9_clks R8A7794_CLK_I2C2>;
...@@ -647,7 +647,7 @@ i2c2: i2c@e6530000 { ...@@ -647,7 +647,7 @@ i2c2: i2c@e6530000 {
}; };
i2c3: i2c@e6540000 { i2c3: i2c@e6540000 {
compatible = "renesas,i2c-r8a7794"; compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>; reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C3>; clocks = <&mstp9_clks R8A7794_CLK_I2C3>;
...@@ -659,7 +659,7 @@ i2c3: i2c@e6540000 { ...@@ -659,7 +659,7 @@ i2c3: i2c@e6540000 {
}; };
i2c4: i2c@e6520000 { i2c4: i2c@e6520000 {
compatible = "renesas,i2c-r8a7794"; compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>; reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C4>; clocks = <&mstp9_clks R8A7794_CLK_I2C4>;
...@@ -671,7 +671,7 @@ i2c4: i2c@e6520000 { ...@@ -671,7 +671,7 @@ i2c4: i2c@e6520000 {
}; };
i2c5: i2c@e6528000 { i2c5: i2c@e6528000 {
compatible = "renesas,i2c-r8a7794"; compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>; reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R8A7794_CLK_I2C5>; clocks = <&mstp9_clks R8A7794_CLK_I2C5>;
...@@ -683,7 +683,8 @@ i2c5: i2c@e6528000 { ...@@ -683,7 +683,8 @@ i2c5: i2c@e6528000 {
}; };
i2c6: i2c@e6500000 { i2c6: i2c@e6500000 {
compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>; reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_IIC0>; clocks = <&mstp3_clks R8A7794_CLK_IIC0>;
...@@ -697,7 +698,8 @@ i2c6: i2c@e6500000 { ...@@ -697,7 +698,8 @@ i2c6: i2c@e6500000 {
}; };
i2c7: i2c@e6510000 { i2c7: i2c@e6510000 {
compatible = "renesas,iic-r8a7794", "renesas,rmobile-iic"; compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6510000 0 0x425>; reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_IIC1>; clocks = <&mstp3_clks R8A7794_CLK_IIC1>;
...@@ -878,7 +880,8 @@ hsusb: usb@e6590000 { ...@@ -878,7 +880,8 @@ hsusb: usb@e6590000 {
}; };
usbphy: usb-phy@e6590100 { usbphy: usb-phy@e6590100 {
compatible = "renesas,usb-phy-r8a7794"; compatible = "renesas,usb-phy-r8a7794",
"renesas,rcar-gen2-usb-phy";
reg = <0 0xe6590100 0 0x100>; reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
arch/arm/boot/dts/sh73a0.dtsi
View file @ 70c6420c
...@@ -263,7 +263,7 @@ GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH ...@@ -263,7 +263,7 @@ GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH
}; };
mmcif: mmc@e6bd0000 { mmcif: mmc@e6bd0000 {
compatible = "renesas,sh-mmcif"; compatible = "renesas,mmcif-sh73a0", "renesas,sh-mmcif";
reg = <0xe6bd0000 0x100>; reg = <0xe6bd0000 0x100>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
......
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