Commit 718ef9f0 authored by Richard Russon's avatar Richard Russon

Merge flatcap.org:/home/flatcap/backup/bk/ntfs-2.6

into flatcap.org:/home/flatcap/backup/bk/ntfs-2.6-devel
parents fcd27415 b203e95a
......@@ -253,8 +253,6 @@ config NUMA
depends on SMP
default n
source "arch/m32r/drivers/Kconfig"
# turning this on wastes a bunch of space.
# Summit needs it only when NUMA is on
config BOOT_IOREMAP
......
......@@ -36,7 +36,6 @@ core-y += arch/m32r/kernel/ \
arch/m32r/mm/ \
arch/m32r/boot/
drivers-y += arch/m32r/drivers/
drivers-$(CONFIG_OPROFILE) += arch/m32r/oprofile/
boot := arch/m32r/boot
......
#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.txt.
#
menu "M32R drivers"
config M32RPCC
bool "M32R PCMCIA I/F"
depends on CHIP_M32700
config M32R_CFC
bool "CF I/F Controller"
depends on PLAT_USRV || PLAT_M32700UT || PLAT_MAPPI2 || PLAT_OPSPUT
config M32700UT_CFC
bool
depends on M32R_CFC
default y
config CFC_NUM
int "CF I/F number"
depends on PLAT_USRV || PLAT_M32700UT
default "1" if PLAT_USRV || PLAT_M32700UT || PLAT_MAPPI2 || PLAT_OPSPUT
config MTD_M32R
bool "Flash device mapped on M32R"
depends on PLAT_USRV || PLAT_M32700UT || PLAT_MAPPI2
config M32700UT_DS1302
bool "DS1302 Real Time Clock support"
depends on PLAT_M32700UT || PLAT_OPSPUT
endmenu
#
# Makefile for the Linux/M32R driver
#
obj-$(CONFIG_M32RPCC) += m32r_pcc.o
obj-$(CONFIG_M32R_CFC) += m32r_cfc.o
obj-$(CONFIG_M32700UT_DS1302) += ds1302.o
#include "../../../drivers/pcmcia/cs_internal.h"
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/*
* $Id$
*
* Copyright (C) 2001 by Hiroyuki Kondo
*/
#if !defined(CONFIG_PLAT_USRV)
#define M32R_MAX_PCC 2
#else /* CONFIG_PLAT_USRV */
#define M32R_MAX_PCC CONFIG_CFC_NUM
#endif /* CONFIG_PLAT_USRV */
/*
* M32R PC Card Controler
*/
#define M32R_PCC0_BASE 0x00ef7000
#define M32R_PCC1_BASE 0x00ef7020
/*
* Register offsets
*/
#define PCCR 0x00
#define PCADR 0x04
#define PCMOD 0x08
#define PCIRC 0x0c
#define PCCSIGCR 0x10
#define PCATCR 0x14
/*
* PCCR
*/
#define PCCR_PCEN (1UL<<(31-31))
/*
* PCIRC
*/
#define PCIRC_BWERR (1UL<<(31-7))
#define PCIRC_CDIN1 (1UL<<(31-14))
#define PCIRC_CDIN2 (1UL<<(31-15))
#define PCIRC_BEIEN (1UL<<(31-23))
#define PCIRC_CIIEN (1UL<<(31-30))
#define PCIRC_COIEN (1UL<<(31-31))
/*
* PCCSIGCR
*/
#define PCCSIGCR_SEN (1UL<<(31-3))
#define PCCSIGCR_VEN (1UL<<(31-7))
#define PCCSIGCR_CRST (1UL<<(31-15))
#define PCCSIGCR_COCR (1UL<<(31-31))
/*
*
*/
#define PCMOD_AS_ATTRIB (1UL<<(31-19))
#define PCMOD_AS_IO (1UL<<(31-18))
#define PCMOD_CBSZ (1UL<<(31-23)) /* set for 8bit */
#define PCMOD_DBEX (1UL<<(31-31)) /* set for excahnge */
/*
* M32R PCC Map addr
*/
#define M32R_PCC0_MAPBASE 0x14000000
#define M32R_PCC1_MAPBASE 0x16000000
#define M32R_PCC_MAPMAX 0x02000000
#define M32R_PCC_MAPSIZE 0x00001000 /* XXX */
#define M32R_PCC_MAPMASK (~(M32R_PCC_MAPMAX-1))
#define CFC_IOPORT_BASE 0x1000
#if !defined(CONFIG_PLAT_USRV)
#define CFC_ATTR_MAPBASE 0x0c014000
#define CFC_IO_MAPBASE_BYTE 0xac012000
#define CFC_IO_MAPBASE_WORD 0xac002000
#else /* CONFIG_PLAT_USRV */
#define CFC_ATTR_MAPBASE 0x04014000
#define CFC_IO_MAPBASE_BYTE 0xa4012000
#define CFC_IO_MAPBASE_WORD 0xa4002000
#endif /* CONFIG_PLAT_USRV */
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/*
* $Id$
*
* Copyright (C) 2001 by Hiroyuki Kondo
*/
#define M32R_MAX_PCC 2
/*
* M32R PC Card Controler
*/
#define M32R_PCC0_BASE 0x00ef7000
#define M32R_PCC1_BASE 0x00ef7020
/*
* Register offsets
*/
#define PCCR 0x00
#define PCADR 0x04
#define PCMOD 0x08
#define PCIRC 0x0c
#define PCCSIGCR 0x10
#define PCATCR 0x14
/*
* PCCR
*/
#define PCCR_PCEN (1UL<<(31-31))
/*
* PCIRC
*/
#define PCIRC_BWERR (1UL<<(31-7))
#define PCIRC_CDIN1 (1UL<<(31-14))
#define PCIRC_CDIN2 (1UL<<(31-15))
#define PCIRC_BEIEN (1UL<<(31-23))
#define PCIRC_CIIEN (1UL<<(31-30))
#define PCIRC_COIEN (1UL<<(31-31))
/*
* PCCSIGCR
*/
#define PCCSIGCR_SEN (1UL<<(31-3))
#define PCCSIGCR_VEN (1UL<<(31-7))
#define PCCSIGCR_CRST (1UL<<(31-15))
#define PCCSIGCR_COCR (1UL<<(31-31))
/*
*
*/
#define PCMOD_AS_ATTRIB (1UL<<(31-19))
#define PCMOD_AS_IO (1UL<<(31-18))
#define PCMOD_CBSZ (1UL<<(31-23)) /* set for 8bit */
#define PCMOD_DBEX (1UL<<(31-31)) /* set for excahnge */
/*
* M32R PCC Map addr
*/
#define M32R_PCC0_MAPBASE 0x14000000
#define M32R_PCC1_MAPBASE 0x16000000
#define M32R_PCC_MAPMAX 0x02000000
#define M32R_PCC_MAPSIZE 0x00001000 /* XXX */
#define M32R_PCC_MAPMASK (~(M32R_PCC_MAPMAX-1))
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/*
* Flash Memory Driver for M32700UT-CPU
*
* Copyright 2003 (C) Takeo Takahashi
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* 2003-02-01: Takeo Takahashi, support M5M29GT320VP.
*/
#include <asm/m32r.h>
#ifdef __KERNEL__
#undef DEBUG
/* debug routine:
* 0x00000001: print debug information
*/
# define DEBUG(n, args...) if ((n) & debug) \
printk(KERN_DEBUG args)
#endif /* __KERNEL__ */
/*
* data type to access flash memory
*/
typedef volatile unsigned short m5_t;
/*
* - Page program buffer size in byte
* - block size in byte
* - number of block
*/
#define M5_PAGE_SIZE (256)
#define M5_BLOCK_SIZE8 (8*1024)
#define M5_BLOCK_SIZE64 (64*1024)
#define MAX_BLOCK_NUM 70
/*
* Software commands
*/
#define M5_CMD_READ_ARRAY 0xff
#define M5_CMD_DEVICE_IDENT 0x90
#define M5_CMD_READ_STATUS 0x70
#define M5_CMD_CLEAR_STATUS 0x50
#define M5_CMD_BLOCK_ERASE 0x20
#define M5_CMD_CONFIRM 0xd0
#define M5_CMD_PROGRAM_BYTE 0x40
#define M5_CMD_PROGRAM_WORD M5_CMD_PROGRAM_BYTE
#define M5_CMD_PROGRAM_PAGE 0x41
#define M5_CMD_SINGLE_LOAD_DATA 0x74
#define M5_CMD_BUFF2FLASH 0x0e
#define M5_CMD_FLASH2BUFF 0xf1
#define M5_CMD_CLEAR_BUFF 0x55
#define M5_CMD_SUSPEND 0xb0
#define M5_CMD_RESUME 0xd0
/*
* Status
*/
#define M5_STATUS_READY 0x80 /* 0:busy 1:ready */
#define M5_STATUS_SUSPEND 0x40 /* 0:progress/complete 1:suspend */
#define M5_STATUS_ERASE 0x20 /* 0:pass 1:error */
#define M5_STATUS_PROGRAM 0x10 /* 0:pass 1:error */
#define M5_STATUS_BLOCK 0x08 /* 0:pass 1:error */
/*
* Device Code
*/
#define M5_MAKER (0x1c)
#define M5_M5M29GT320VP (0x20)
#define M5_M5M29GB320VP (0x21)
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/*
* Mitsubishi M32R 32102 group
* Typical I/O routines.
*
* Copyright (c) 2001 Hitoshi Yamamoto
*/
/* $Id$ */
#include <linux/config.h>
#include <asm/page.h>
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
#include <linux/types.h>
#define M32R_PCC_IOMAP_SIZE 0x1000
#define M32R_PCC_IOSTART0 0x1000
#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
#define M32R_PCC_IOSTART1 0x2000
#define M32R_PCC_IOEND1 (M32R_PCC_IOSTART1 + M32R_PCC_IOMAP_SIZE - 1)
extern void pcc_ioread(int, unsigned long, void *, size_t, size_t, int);
extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int);
#endif /* CONFIG_PCMCIA && CONFIG_M32RPCC */
/*
* Function prototypes
*/
unsigned char ne_inb(unsigned long);
void ne_outb(unsigned char, unsigned long);
void ne_insb(unsigned int, void *, unsigned long);
void ne_insw(unsigned int, void *, unsigned long);
void ne_outsb(unsigned int, const void *, unsigned long);
void ne_outsw(unsigned int, const void *, unsigned long);
#define PORT2ADDR(port) m32102_port2addr(port)
static __inline__ unsigned long
m32102_port2addr(unsigned long port)
{
unsigned long ul;
ul = port + PAGE_OFFSET + 0x20000000;
return (ul);
}
unsigned char
m32102_inb(unsigned long port)
{
#ifdef CONFIG_PLAT_MAPPI
if(port >= 0x300 && port < 0x320)
return ne_inb(port);
else
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
unsigned char b;
pcc_ioread(0, port, &b, sizeof(b), 1, 0);
return b;
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
unsigned char b;
pcc_ioread(1, port, &b, sizeof(b), 1, 0);
return b;
} else
#endif
#endif /* CONFIG_PLAT_MAPPI */
return *(unsigned char *)PORT2ADDR(port);
}
unsigned short
m32102_inw(unsigned long port)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
unsigned short w;
pcc_ioread(0, port, &w, sizeof(w), 1, 0);
return w;
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
unsigned short w;
pcc_ioread(1, port, &w, sizeof(w), 1, 0);
return w;
} else
#endif
return *(unsigned short *)PORT2ADDR(port);
}
unsigned long
m32102_inl(unsigned long port)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
unsigned long l;
pcc_ioread(0, port, &l, sizeof(l), 1, 0);
return l;
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
unsigned short l;
pcc_ioread(1, port, &l, sizeof(l), 1, 0);
return l;
} else
#endif
return *(unsigned long *)PORT2ADDR(port);
}
void
m32102_outb(unsigned char b, unsigned long port)
{
#ifdef CONFIG_PLAT_MAPPI
if(port >= 0x300 && port < 0x320)
ne_outb(b,port);
else
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite(0, port, &b, sizeof(b), 1, 0);
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
pcc_iowrite(1, port, &b, sizeof(b), 1, 0);
} else
#endif
#endif /* CONFIG_PLAT_MAPPI */
*(unsigned volatile char *)PORT2ADDR(port) = b;
}
void
m32102_outw(unsigned short w, unsigned long port)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite(0, port, &w, sizeof(w), 1, 0);
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
pcc_iowrite(1, port, &w, sizeof(w), 1, 0);
} else
#endif
*(unsigned volatile short *)PORT2ADDR(port) = w;
}
void
m32102_outl(unsigned long l, unsigned long port)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite(0, port, &l, sizeof(l), 1, 0);
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
pcc_iowrite(1, port, &l, sizeof(l), 1, 0);
} else
#endif
*(unsigned volatile long *)PORT2ADDR(port) = l;
}
void
m32102_insb(unsigned int port, void * addr, unsigned long count)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_ioread(0, port, (void *)addr, sizeof(unsigned char), count, 1);
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
pcc_ioread(1, port, (void *)addr, sizeof(unsigned char), count, 1);
} else
#endif
while(count--){
*(unsigned char *)addr = *(unsigned volatile char *)PORT2ADDR(port);
addr+=1;
}
}
void
m32102_insw(unsigned int port, void * addr, unsigned long count)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_ioread(0, port, (void *)addr, sizeof(unsigned short), count, 1);
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
pcc_ioread(1, port, (void *)addr, sizeof(unsigned short), count, 1);
} else
#endif
while(count--){
*(unsigned short *)addr = *(unsigned volatile short *)PORT2ADDR(port);
addr+=2;
}
}
void
m32102_outsb(unsigned int port, const void * addr, unsigned long count)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite(0, port, (void *)addr, sizeof(unsigned char), count, 1);
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
pcc_iowrite(1, port, (void *)addr, sizeof(unsigned char), count, 1);
} else
#endif
while(count--){
*(unsigned volatile char *)PORT2ADDR(port) = *(unsigned char *)addr;
addr+=1;
}
}
void
m32102_outsw(unsigned int port, const void * addr, unsigned long count)
{
#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32RPCC)
if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
pcc_iowrite(0, port, (void *)addr, sizeof(unsigned short), count, 1);
} else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
pcc_iowrite(1, port, (void *)addr, sizeof(unsigned short), count, 1);
} else
#endif
while(count--){
*(unsigned volatile short *)PORT2ADDR(port) = *(unsigned short *)addr;
addr+=2;
}
}
#ifdef CONFIG_PLAT_MAPPI
unsigned char
ne_inb(unsigned long port)
{
unsigned short tmp;
port <<= 1;
port+= PAGE_OFFSET + 0x20000000 + 0x0c000000;
tmp = *(unsigned short *)port;
return (unsigned char)tmp;
}
void
ne_outb(unsigned char b, unsigned long port)
{
port <<= 1;
port += PAGE_OFFSET + 0x20000000 + 0x0c000000;
*(unsigned volatile short *)port = (unsigned short)b;
}
void
ne_insb(unsigned int port, void * addr, unsigned long count)
{
unsigned short tmp;
port <<= 1;
port+= PAGE_OFFSET + 0x20000000 + 0x0c000000;
tmp = *(unsigned short *)port;
while(count--){
*(unsigned char *)addr = *(unsigned volatile char *)port;
addr+=1;
}
}
void
ne_insw(unsigned int port, void * addr, unsigned long count) {
unsigned short tmp;
port <<= 1;
port+= PAGE_OFFSET + 0x20000000 + 0x0c000000;
while(count--){
tmp = *(unsigned volatile short *)port;
*(unsigned short *)addr = (tmp>>8) | (tmp <<8);
addr+=2;
}
}
void
ne_outsb(unsigned int port, const void * addr, unsigned long count)
{
port <<= 1;
port += PAGE_OFFSET + 0x20000000 + 0x0c000000;
while(count--){
*(unsigned volatile short *)port = *(unsigned char *)addr;
addr+=1;
}
}
void
ne_outsw(unsigned int port, const void * addr, unsigned long count)
{
unsigned short tmp;
port <<= 1;
port += PAGE_OFFSET + 0x20000000 + 0x0c000000;
while(count--){
tmp = *(unsigned short *)addr;
*(unsigned volatile short *)port = (tmp>>8)|(tmp<<8);
addr+=2;
}
}
#endif /* CONFIG_PLAT_MAPPI */
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/*
* linux/arch/m32r/mm/io_remap.c
* linux/arch/m32r/mm/ioremap-nommu.c
*
* Copyright (c) 2001, 2002 Hiroyuki Kondo
*
......@@ -38,14 +38,15 @@
#define IS_LOW512(addr) (!((unsigned long)(addr) & ~0x1fffffffUL))
void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags)
void __iomem *
__ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags)
{
return (void *)phys_addr;
}
#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1)
void iounmap(void *addr)
void iounmap(volatile void __iomem *addr)
{
}
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