Commit 72a1179e authored by Samu Onkalo's avatar Samu Onkalo Committed by Tony Lindgren

omap: dma: Support for prefetch in destination synchronizedtransfer

Omap DMA controller can prefetch data in advance in case of
destination synchronized data transfer. This may increase
performance when target HW block doesn't have fifo.
Data is waiting for transfer request in DMA fifo instead of read from memory.
Signed-off-by: default avatarSamu Onkalo <samu.p.onkalo@nokia.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 5ebc0d52
...@@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, ...@@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
val = dma_read(CCR(lch)); val = dma_read(CCR(lch));
/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */ /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
val &= ~((3 << 19) | 0x1f); val &= ~((1 << 23) | (3 << 19) | 0x1f);
val |= (dma_trigger & ~0x1f) << 14; val |= (dma_trigger & ~0x1f) << 14;
val |= dma_trigger & 0x1f; val |= dma_trigger & 0x1f;
...@@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, ...@@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
else else
val &= ~(1 << 18); val &= ~(1 << 18);
if (src_or_dst_synch) if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
val &= ~(1 << 24); /* dest synch */
val |= (1 << 23); /* Prefetch */
} else if (src_or_dst_synch) {
val |= 1 << 24; /* source synch */ val |= 1 << 24; /* source synch */
else } else {
val &= ~(1 << 24); /* dest synch */ val &= ~(1 << 24); /* dest synch */
}
dma_write(val, CCR(lch)); dma_write(val, CCR(lch));
} }
......
...@@ -345,6 +345,7 @@ ...@@ -345,6 +345,7 @@
#define OMAP_DMA_SYNC_BLOCK 0x02 #define OMAP_DMA_SYNC_BLOCK 0x02
#define OMAP_DMA_SYNC_PACKET 0x03 #define OMAP_DMA_SYNC_PACKET 0x03
#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
#define OMAP_DMA_SRC_SYNC 0x01 #define OMAP_DMA_SRC_SYNC 0x01
#define OMAP_DMA_DST_SYNC 0x00 #define OMAP_DMA_DST_SYNC 0x00
......
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