Commit 73d4d2ef authored by Jeffrey Hugo's avatar Jeffrey Hugo Committed by Bjorn Andersson

arm64: dts: qcom: msm8998: Add blsp1_uart3

The blsp1_uart3 peripheral appears to be commonly used for interfacing with
other SoCs on a platform, such as a wcn3990 to provide bluetooth.
Signed-off-by: default avatarJeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent f1c1d4fe
...@@ -75,4 +75,17 @@ config { ...@@ -75,4 +75,17 @@ config {
drive-strength = <2>; /* 2 mA */ drive-strength = <2>; /* 2 mA */
}; };
}; };
blsp1_uart3_on: blsp1_uart3_on {
mux {
pins = "gpio45", "gpio46", "gpio47", "gpio48";
function = "blsp_uart3_a";
};
config {
pins = "gpio45", "gpio46", "gpio47", "gpio48";
drive-strength = <2>;
bias-disable;
};
};
}; };
...@@ -1569,6 +1569,20 @@ blsp1_dma: dma@c144000 { ...@@ -1569,6 +1569,20 @@ blsp1_dma: dma@c144000 {
qcom,num-ees = <4>; qcom,num-ees = <4>;
}; };
blsp1_uart3: serial@c171000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x0c171000 0x1000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp1_dma 4>, <&blsp1_dma 5>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&blsp1_uart3_on>;
status = "disabled";
};
blsp1_i2c1: i2c@c175000 { blsp1_i2c1: i2c@c175000 {
compatible = "qcom,i2c-qup-v2.2.1"; compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x0c175000 0x600>; reg = <0x0c175000 0x600>;
......
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