Commit 74e63951 authored by Abel Vesa's avatar Abel Vesa Committed by Shawn Guo

clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based

Renaming the imx_clk_pllv4 register function to imx_clk_hw_pllv4 to be
more obvious it is clk_hw based.
Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 179c1f7c
...@@ -90,8 +90,8 @@ static void __init imx7ulp_clk_scg1_init(struct device_node *np) ...@@ -90,8 +90,8 @@ static void __init imx7ulp_clk_scg1_init(struct device_node *np)
clks[IMX7ULP_CLK_SPLL_PRE_DIV] = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x608, 8, 3, CLK_SET_RATE_GATE); clks[IMX7ULP_CLK_SPLL_PRE_DIV] = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x608, 8, 3, CLK_SET_RATE_GATE);
/* name parent_name base */ /* name parent_name base */
clks[IMX7ULP_CLK_APLL] = imx_clk_pllv4("apll", "apll_pre_div", base + 0x500); clks[IMX7ULP_CLK_APLL] = imx_clk_hw_pllv4("apll", "apll_pre_div", base + 0x500);
clks[IMX7ULP_CLK_SPLL] = imx_clk_pllv4("spll", "spll_pre_div", base + 0x600); clks[IMX7ULP_CLK_SPLL] = imx_clk_hw_pllv4("spll", "spll_pre_div", base + 0x600);
/* APLL PFDs */ /* APLL PFDs */
clks[IMX7ULP_CLK_APLL_PFD0] = imx_clk_pfdv2("apll_pfd0", "apll", base + 0x50c, 0); clks[IMX7ULP_CLK_APLL_PFD0] = imx_clk_pfdv2("apll_pfd0", "apll", base + 0x50c, 0);
......
...@@ -206,7 +206,7 @@ static const struct clk_ops clk_pllv4_ops = { ...@@ -206,7 +206,7 @@ static const struct clk_ops clk_pllv4_ops = {
.is_enabled = clk_pllv4_is_enabled, .is_enabled = clk_pllv4_is_enabled,
}; };
struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name, struct clk_hw *imx_clk_hw_pllv4(const char *name, const char *parent_name,
void __iomem *base) void __iomem *base)
{ {
struct clk_pllv4 *pll; struct clk_pllv4 *pll;
......
...@@ -176,7 +176,7 @@ struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name, ...@@ -176,7 +176,7 @@ struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
.kdiv = (_k), \ .kdiv = (_k), \
} }
struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name, struct clk_hw *imx_clk_hw_pllv4(const char *name, const char *parent_name,
void __iomem *base); void __iomem *base);
struct clk_hw *clk_hw_register_gate2(struct device *dev, const char *name, struct clk_hw *clk_hw_register_gate2(struct device *dev, const char *name,
......
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