[PATCH] ia64: fix critical perfmon2 bugs

This patch fixes the following issues:

- fix a nasty corner case by which a task could inherit psr.pp/psr.up
  that could be stale by the time it runs. psr.pp/psr.up bits must be
  cleared on fork and inherited on execve(). Test case provided by
  John Levon.

- mask interrupts when locking the pfm stat structure. We don't want
  to take PMU interrupts in the middle of this kind of critical
  section.

- fix a bug in pfm_close() for context which use asynchronous
  notifications.  You cannot call fasync_helper() with interrupts
  disabled because it reenables them. There was no real danger of
  moving the call outside our critical section.

- fix a bug in in pfm_flush_pmds() where you can leave the freeze bit
  set in the pmc saved state.

- updated dump_pmu_state()

- cleanup the BUG_ON() usage

arch/ia64/kernel/process.c

@@ -353,9 +353,13 @@ copy_thread (int nr, unsigned long clone_flags,
 	/* copy parts of thread_struct: */
 	p->thread.ksp = (unsigned long) child_stack - 16;
 
-	/* stop some PSR bits from being inherited: */
+	/* stop some PSR bits from being inherited.
+	 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
+	 * therefore we must specify them explicitly here and not include them in
+	 * IA64_PSR_BITS_TO_CLEAR.
+	 */
 	child_ptregs->cr_ipsr =  ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
-				  & ~IA64_PSR_BITS_TO_CLEAR);
+			      & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
 
 	/*
 	 * NOTE: The calling convention considers all floating point