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Commit 7510a9c6 authored by Shayenne Moura's avatar Shayenne Moura Committed by Daniel Vetter
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drm: msm: Cleanup drm_display_mode print str 

This patch adjust the print string of drm_display_mode object
to remove drm_mode_object dependency in msm files.
Reported-by: default avatarkbuild test robot <lkp@intel.com>
Signed-off-by: default avatarShayenne Moura <shayenneluzmoura@gmail.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/3e2dcd38c964061f245b0ae22186c71da06e9742.1547143069.git.shayenneluzmoura@gmail.com
parent f4bd542b
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Inline Side-by-side
Showing with 10 additions and 72 deletions
drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c
View file @ 7510a9c6
...@@ -244,14 +244,8 @@ static void mdp4_crtc_mode_set_nofb(struct drm_crtc *crtc) ...@@ -244,14 +244,8 @@ static void mdp4_crtc_mode_set_nofb(struct drm_crtc *crtc)
mode = &crtc->state->adjusted_mode; mode = &crtc->state->adjusted_mode;
DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("%s: set mode: " DRM_MODE_FMT,
mdp4_crtc->name, mode->base.id, mode->name, mdp4_crtc->name, DRM_MODE_ARG(mode));
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
mdp4_write(mdp4_kms, REG_MDP4_DMA_SRC_SIZE(dma), mdp4_write(mdp4_kms, REG_MDP4_DMA_SRC_SIZE(dma),
MDP4_DMA_SRC_SIZE_WIDTH(mode->hdisplay) | MDP4_DMA_SRC_SIZE_WIDTH(mode->hdisplay) |
......
drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
View file @ 7510a9c6
...@@ -58,14 +58,7 @@ static void mdp4_dsi_encoder_mode_set(struct drm_encoder *encoder, ...@@ -58,14 +58,7 @@ static void mdp4_dsi_encoder_mode_set(struct drm_encoder *encoder,
mode = adjusted_mode; mode = adjusted_mode;
DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
mode->base.id, mode->name,
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
ctrl_pol = 0; ctrl_pol = 0;
if (mode->flags & DRM_MODE_FLAG_NHSYNC) if (mode->flags & DRM_MODE_FLAG_NHSYNC)
......
drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c
View file @ 7510a9c6
...@@ -104,14 +104,7 @@ static void mdp4_dtv_encoder_mode_set(struct drm_encoder *encoder, ...@@ -104,14 +104,7 @@ static void mdp4_dtv_encoder_mode_set(struct drm_encoder *encoder,
mode = adjusted_mode; mode = adjusted_mode;
DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
mode->base.id, mode->name,
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
mdp4_dtv_encoder->pixclock = mode->clock * 1000; mdp4_dtv_encoder->pixclock = mode->clock * 1000;
......
drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
View file @ 7510a9c6
...@@ -273,14 +273,7 @@ static void mdp4_lcdc_encoder_mode_set(struct drm_encoder *encoder, ...@@ -273,14 +273,7 @@ static void mdp4_lcdc_encoder_mode_set(struct drm_encoder *encoder,
mode = adjusted_mode; mode = adjusted_mode;
DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
mode->base.id, mode->name,
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
mdp4_lcdc_encoder->pixclock = mode->clock * 1000; mdp4_lcdc_encoder->pixclock = mode->clock * 1000;
......
drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
View file @ 7510a9c6
...@@ -134,14 +134,7 @@ void mdp5_cmd_encoder_mode_set(struct drm_encoder *encoder, ...@@ -134,14 +134,7 @@ void mdp5_cmd_encoder_mode_set(struct drm_encoder *encoder,
{ {
mode = adjusted_mode; mode = adjusted_mode;
DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
mode->base.id, mode->name,
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
pingpong_tearcheck_setup(encoder, mode); pingpong_tearcheck_setup(encoder, mode);
mdp5_crtc_set_pipeline(encoder->crtc); mdp5_crtc_set_pipeline(encoder->crtc);
} }
......
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c
View file @ 7510a9c6
...@@ -384,14 +384,7 @@ static void mdp5_crtc_mode_set_nofb(struct drm_crtc *crtc) ...@@ -384,14 +384,7 @@ static void mdp5_crtc_mode_set_nofb(struct drm_crtc *crtc)
mode = &crtc->state->adjusted_mode; mode = &crtc->state->adjusted_mode;
DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("%s: set mode: " DRM_MODE_FMT, crtc->name, DRM_MODE_ARG(mode));
crtc->name, mode->base.id, mode->name,
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
mixer_width = mode->hdisplay; mixer_width = mode->hdisplay;
if (r_mixer) if (r_mixer)
......
drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c
View file @ 7510a9c6
...@@ -118,14 +118,7 @@ static void mdp5_vid_encoder_mode_set(struct drm_encoder *encoder, ...@@ -118,14 +118,7 @@ static void mdp5_vid_encoder_mode_set(struct drm_encoder *encoder,
mode = adjusted_mode; mode = adjusted_mode;
DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
mode->base.id, mode->name,
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
ctrl_pol = 0; ctrl_pol = 0;
......
drivers/gpu/drm/msm/dsi/dsi_manager.c
View file @ 7510a9c6
...@@ -536,14 +536,7 @@ static void dsi_mgr_bridge_mode_set(struct drm_bridge *bridge, ...@@ -536,14 +536,7 @@ static void dsi_mgr_bridge_mode_set(struct drm_bridge *bridge,
struct mipi_dsi_host *host = msm_dsi->host; struct mipi_dsi_host *host = msm_dsi->host;
bool is_dual_dsi = IS_DUAL_DSI(); bool is_dual_dsi = IS_DUAL_DSI();
DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
mode->base.id, mode->name,
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
if (is_dual_dsi && !IS_MASTER_DSI_LINK(id)) if (is_dual_dsi && !IS_MASTER_DSI_LINK(id))
return; return;
......
drivers/gpu/drm/msm/edp/edp_bridge.c
View file @ 7510a9c6
...@@ -60,14 +60,7 @@ static void edp_bridge_mode_set(struct drm_bridge *bridge, ...@@ -60,14 +60,7 @@ static void edp_bridge_mode_set(struct drm_bridge *bridge,
struct edp_bridge *edp_bridge = to_edp_bridge(bridge); struct edp_bridge *edp_bridge = to_edp_bridge(bridge);
struct msm_edp *edp = edp_bridge->edp; struct msm_edp *edp = edp_bridge->edp;
DBG("set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode));
mode->base.id, mode->name,
mode->vrefresh, mode->clock,
mode->hdisplay, mode->hsync_start,
mode->hsync_end, mode->htotal,
mode->vdisplay, mode->vsync_start,
mode->vsync_end, mode->vtotal,
mode->type, mode->flags);
list_for_each_entry(connector, &dev->mode_config.connector_list, head) { list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
if ((connector->encoder != NULL) && if ((connector->encoder != NULL) &&
......
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